display.rs: DP link retraining at set_mode time
Before enabling DDI_BUF_CTL, retrain DP link for the active port
Uses display's own dp_aux vector for DPCD communication
Fixes link recovery after mode changes
syncobj.rs: sync_file fd infrastructure
export_sync_file(): generate fd token, map syncobj → fd
import_sync_file(): resolve fd token → syncobj handle
close_sync_file(): remove fd from table
driver.rs: GpuDriver trait methods for sync_file
syncobj_export_fd() / syncobj_import_fd() with default Unsupported
mod.rs: IntelDriver implementation delegates to SyncobjManager
scheme.rs: DRM_IOCTL_REDOX_SYNCOBJ_HANDLE_TO_FD (0x73)
DRM_IOCTL_REDOX_SYNCOBJ_FD_TO_HANDLE (0x74)
Wire types with proper #[repr(C)] Copy+Clone attributes
ring.rs: fix MI_USER_INTERRUPT value
Was 0x0200_0000 (same as MI_FLUSH_DW) — GPU never generated interrupts.
Correct Gen7+ value: 0x6200_0000 (MI_USER_INTERRUPT with proper encoding)
MI_FLUSH_DW in flush() now uses proper DWord length encoding (1<<22)
scheme.rs: SETPLANE now forwards primary plane to page_flip
Primary plane (id=3) flips via driver.page_flip()
Overlay/cursor planes get silent no-op (KWin falls back to primary)
Removes EOPNOTSUPP blocker for KWin Wayland compositor
drivers/mod.rs: remove Gen8+ gate in is_supported_intel_generation()
All pre-Gen9 IDs (I965G, ILK, SNB, IVB/HSW/BDW) now pass probe.
Gen8 Broadwell/Cherryview uses DDI display engine (same as Gen9) —
expected to work with current register paths.
Gen4-Gen7 (I965G through Haswell) use FDI display engine which differs
from DDI. They will probe successfully but display init uses DDI_BUF_CTL
registers that don't exist on FDI hardware. Full FDI support is documented
as future work.
info.rs: +56 entries covering all pre-Gen9 generations
Gen4: 18 IDs (I965G, G33, Q33/Q35, GM965, G45, GM45, Pineview)
Gen5: 2 IDs (Ironlake desktop/mobile)
Gen6: 7 IDs (Sandy Bridge GT1/GT2 desktop/mobile)
Gen7: 11 IDs (Ivy Bridge, Haswell ULT/ULX GT1/GT2/GT3)
Gen8: 18 IDs (Broadwell ULT/ULX GT1/GT2/GT3, Cherryview GT1/GT2)
Total: 56 new entries → info.rs now has 157 device IDs
- cursor.rs: plane scaler (PS_CTRL/PS_WIN/PS_SIZE) with nearest filter,
rotation property (0/90/180/270) via PLANE_ROT_CTL registers
- display_power.rs: gate_ddi_wells + gate_aux_wells per active port count
- gt.rs: GpuStats struct and gpu_stats() method for utilization reporting
- Fix bootloader recipe: pass correct TARGET on make command line
instead of hardcoding x86_64-unknown-uefi (breaks BIOS build)
- Add cargo -Zunstable-options to x86_64-unknown-uefi.mk and
x86-unknown-none.mk for custom target support
- Add x86_64-unknown-uefi.json target file
Remaining: redoxer toolchain cargo/rust-src version mismatch
prevents build-std compilation. Needs 'make prefix' to rebuild
toolchain with matching versions.
Bootloader needs x86_64-unknown-uefi (UEFI target) but redoxer
sets TARGET=x86_64-unknown-redox (OS target). Added:
- x86_64-unknown-uefi.json custom target file
- cargo -Zunstable-options in Makefile for custom target support
- TARGET= override in recipe (may still be overridden by redoxer)
- RPS interactive governor: fast ramp-up on activity, slow ramp-down on idle
- Runtime PM with wakeref counting and RC6 transitions
- Forcewake automatically taken on first wakeref, released on last
- Frequency tracking with min/max/target per-GT state
Root cause chain discovered and fixed:
1. GCC built-in stddef.h shadowed by relibc's _STDDEF_H guard
→ fix_types.h with guarded typedefs for 15+ sys types
2. gnulib configure bakes raw typedefs into GL_CFLAG_GNULIB_WARNINGS
→ strip them from Makefiles after configure
3. __fseterr/__freadahead don't exist in relibc
→ compile C stubs and inject into link via Makefile patch
The recipe pattern is documented and reusable for other gnulib packages
(ninja-build, diffutils, etc.).
Also: bootloader recipe needs RUSTFLAGS=-Zunstable-options for
custom target support after redoxer toolchain restore.
- Create ExeclistPort during driver init with context control registers
- Store execlist_port in IntelDriver for submission routing
- Wire PDP0_LDW/UDW register writes in cs_submit before ring batch
Proven recipe pattern for gnulib cross-compilation on Redox:
1. fix_types.h with guarded typedefs for ALL sys/types.h types
2. Strip raw typedefs from GL_CFLAG_GNULIB_WARNINGS after configure
3. Set cache vars for functions gnulib can't detect
Remaining: __fseterr/__freadahead stubs for linker (need relibc-level
or recipe-level .o injection)
Root cause: gnulib configure bakes raw typedef statements
(typedef long unsigned int size_t; etc.) into the generated
Makefile's GL_CFLAG_GNULIB_WARNINGS variable. These break
shell command parsing when expanded on recipe lines.
Fix:
1. Strip raw typedefs from all generated Makefiles after configure
2. Provide fix_types.h with guarded typedefs for size_t, ptrdiff_t,
off_t, wchar_t, ssize_t, time_t
3. Force-include fix_types.h via CPPFLAGS to work around the
cross-compiler's GCC built-in stddef.h ordering issue
Also: comprehensive upstream relibc comparison and import plan
The cross-compiler's GCC built-in stddef.h is blocked by relibc's
_STDDEF_H guard, causing size_t/off_t/ptrdiff_t to be undefined.
Add fix_types.h with guarded typedefs and force-include via CPPFLAGS.
Also: comprehensive upstream relibc comparison for systematic import.
Remaining: redoxer env overrides CC, injecting broken stdint typedefs
from its toolchain. This needs a redoxer-level fix to clean the
injected flags before passing to build commands.
Without this cache variable, gnulib's configure incorrectly assumes
time_t is unavailable when cross-compiling for Redox, generating
broken fallback headers that fail with 'time_t undeclared' at
the compile-time integrality check.
Add dpp, mmhubbub include paths. Add ilog2 macro.
10 of 11 tested DCN files now compile with 0 errors.
dnc30_cm_common.c excluded — dcn30_cm_common.h missing from Linux 7.1 tree.
cpufreqd:
- Read CPU vendor and frequency from /scheme/sys/cpu (CPUID-based)
- Generate P-states dynamically from detected max/base frequency
- Remove hardcoded 2400-1200 kHz fallback table
- Intel SpeedStep and AMD encoding support
coretempd:
- Detect vendor from /scheme/sys/cpu before MSR probing
- Read CPU count from /scheme/sys/cpu for accuracy
- Fall back to MSR detection only when platform info unavailable
On QEMU's default i440FX machine type, rdmsr on unsupported MSRs
(0x19c IA32_THERM_STATUS, 0x1a2 IA32_TEMPERATURE_TARGET) causes a
kernel #GP that kills the process. Same pattern as cpufreqd: spawn a
child with --probe-msr to test readability before the main loop. If
probe fails, disable all MSR reads and report all CPUs as Unknown.
coretempd uses syscall::call::write() for init notification, which
sends raw bytes — not an fd transfer via CallFlags::FD that the Scheme
init type expects. Changing to Scheme would cause init to block forever
in call_ro waiting for an fd that never arrives in the expected format.
The oneshot_async + resilience pattern is correct for coretempd.
- 29_activate_console.service: oneshot -> oneshot_async (unblocks init
scheduler, enabling getty 2 -> login)
- 15_coretempd.service: oneshot_async -> {scheme="coretemp"} (init
now correctly registers the scheme fd)
- cpufreqd: child-process MSR probe detects QEMU's lack of MSR 0x199
and gracefully degrades to monitoring-only mode
- coretempd: notification failure is now non-fatal (WARN instead of ?)
- driver-manager: "no match entries" downgraded from warn to debug
(infrastructure daemons intentionally have no hw match)
When handle_irq() returns Ok(None) (no IRQ event received),
also call poll_hotplug() to detect connector changes via
HPD register polling fallback. Events are fed through the
same event channel to the scheme handler.
- Fix redox_pci_enable_device to track enabled state instead of noop.
redox_pci_set_master now logs bus master enable.
- Fix redox_request_irq to return the IRQ fd instead of open+close.
redox_free_irq now accepts fd via dev_id and actually closes it.
- SETPLANE now returns EOPNOTSUPP instead of silently succeeding,
with warning about DC dependency.
- OBJ_SETPROPERTY now accepts CRTC_ID (property 30) as a noop
(connector routing is managed by SETCRTC).
- Add blob registry (blobs: BTreeMap<u32, Vec<u8>>) to DrmScheme with
create_blob()/blob_data() methods for property blob storage.
- Fix GETPROPBLOB to return actual blob data instead of echoing back
the request payload. Unknown blob IDs return zero-length blobs.
- Add MODE_ATOMIC ioctl stub: test-only commits return success,
nonblock/page-flip commits delegate to legacy path.
- Add CRTC_PROP_GAMMA_LUT_SIZE (immutable range, min=0 max=256)
and CRTC_PROP_GAMMA_LUT (atomic blob) properties.
- Update crtc_count in GETRESOURCES from 1 to 4 (matches AmdDriver).
- Rename synthetic EDID monitor name from 'Synthetic DP' to
'RedBearSynthDP' for honest origin identification.
- Support 4 CRTCs instead of hardcoded 1 (AMD GPUs have 4-6 CRTCs)
- Add CONN_PROP_DPMS (ID 31) and CONN_PROP_EDID (ID 32) connector properties.
DPMS is an enum property (On/Standby/Suspend/Off). EDID is an immutable blob.
- Add DrmModeObjSetPropertyWire struct and wire OBJ_SETPROPERTY ioctl to
call driver.set_property() with proper error dispatch. Unknown properties
are silently ignored (not errors).
- Add set_property() to GpuDriver trait with default Unsupported impl.
AmdDriver implements DPMS property set by mapping connector_id -> CRTC and
calling DisplayCore::set_dpms().
Lines 649-651 had VramManager and info!() calls that don't belong
in handle_irq(). These were likely from a bad merge. The variables
fb_phys and fb_size are local to new() and don't exist in handle_irq().
- Add VramManager (vram.rs): bump-allocator with free-list coalescing for BAR2 VRAM
aperture. gem_create auto-selects VRAM for scanout buffers (width>0 && height>0)
with fallback to system RAM on exhaustion. gem_close frees VRAM when gpu_addr is
within BAR2 range. ensure_gem_gpu_mapping detects VRAM-backed buffers and skips
GTT mapping.
- Add amdgpu_dc_upload_firmware() stub documenting DMUB firmware upload sequence
prerequisites (requires Linux DC tree compilation).
- Replace generic 'unavailable' CS ioctl/virgl error messages with specific
messages documenting what component is needed (amdgpu core driver, Mesa radeonsi/
iris cross-compilation, CS ioctl backend).
- Fix ASIC detection: use PCI device_id instead of broken MMIO offset-0 read.
Add proper device_id->ASIC family lookup table covering Navi10-Navi33 (RDNA1/RDNA2/RDNA3).
Add per-family properties (DCN revision, firmware name, OTG/HUBP base offsets, HPD register).
- Wire quirk flags from Rust to C: replace pci_get_quirk_flags/pci_has_quirk stubs
(previously always returned 0/false) with stored quirk_flags set via new FFI
redox_pci_set_quirk_flags(). Quirk-aware IRQ policy now actually works.
- Store firmware blobs from Rust to C: add redox_firmware_store() FFI to pass
firmware blobs from AmdDriver.firmware HashMap into C-side storage. C side
can now fall back to scheme:firmware if blobs not pre-stored.
- Fix connector descriptors: replace hardcoded 600x340mm fake dimensions with
per-ASIC-family connector tables (desktop dGPU vs APU layout). Set mm_width/
mm_height to 0 (unprobed — needs DC hardware detection). HPD register offset
now comes from per-family asic_props table.
- Fix register offsets: replace hardcoded OTG base 0x4800 / HUBP base 0x5800
(Navi23-specific) with per-DCN-revision dispatch from asic_props table
(DCN2.0=0x4000/0x5000, DCN3.0=0x4800/0x5800, DCN3.2=0x5000/0x6000).
Add pcid-spawner to initfs binaries for early boot driver spawning.
Add pcid.d/00-storage.toml with initfs-path driver commands.
pcid-spawner uses the channel protocol which works; driver-manager
hangs on pcid config handle reads.
- Skip binary existence check in probe(): Redox scheme paths
(especially /scheme/initfs/) may block on open/stat indefinitely.
Command::new() spawn fails cleanly if binary missing.
- In initfs mode: use synchronous probe, do bounded deferred
retries, then exit. Rootfs instance handles hotplug.
- Avoids pcid config handle read hang that blocks async threads.
vasilito