fix: add reasonable P-state fallback when platform detection fails but MSR works

local/recipes/system/cpufreqd/source/src/main.rs

@@ -221,6 +221,16 @@ fn main() {
         if ps.is_empty() {
             ps = generate_pstates_from_freq(base_mhz, max_mhz, is_intel);
         }
+        // Last resort: when platform detection fails but MSR writes work,
+        // provide a reasonable default P-state table based on IA32_PERF_CTL ratios.
+        if ps.is_empty() && MSR_AVAILABLE.load(Ordering::Relaxed) {
+            ps = vec![
+                PState { freq_khz: 2400, power_mw: 35000, latency_us: 10, ctl: if is_intel { 0x1800 } else { 24 } },
+                PState { freq_khz: 2000, power_mw: 25000, latency_us: 10, ctl: if is_intel { 0x1400 } else { 20 } },
+                PState { freq_khz: 1600, power_mw: 18000, latency_us: 10, ctl: if is_intel { 0x1000 } else { 16 } },
+                PState { freq_khz: 1200, power_mw: 12000, latency_us: 10, ctl: if is_intel { 0x0c00 } else { 12 } },
+            ];
+        }
         eprintln!("[INFO] cpufreqd: CPU{}: {} P-states ({} - {} kHz)", id, ps.len(), ps.first().map_or(0, |p| p.freq_khz), ps.last().map_or(0, |p| p.freq_khz));
         CpuInfo { id, pstates: ps, current_idx: 0, load_history: [0.0; SAMPLE_WINDOW], load_idx: 0, throttle: false, msr_errors: 0, msr_suppressed: false }
     }).collect();