bjorn3
4f583b1cfb
Store decoded MSI info instead of full capability in PciFeatureInfo
2024-06-11 16:48:43 +02:00
bjorn3
df66633111
pcid: Store decoded MsixInfo instead of full capability in PciFeatureInfo
2024-06-10 21:00:07 +02:00
bjorn3
7c112c34dd
pcid: Remove some unused methods on MsixCapability
2024-06-10 19:44:12 +02:00
bjorn3
123eef9635
pcid: Move capability offset into the Capability enum
...
This makes it easier to move to using pci_types for parsing PCI
capabilities.
2024-06-10 19:44:12 +02:00
bjorn3
027d952c39
pcid: Remove parsing of unused capabilities
...
This will make it easier to switch to pci_types for capability parsing
in the future.
2024-06-09 20:38:46 +02:00
bjorn3
eb2e670cd6
pcid: Explain why PciBar is used instead of pcid_types::Bar
2024-06-09 18:53:19 +02:00
bjorn3
b04915673d
pcid: Remove ConfigReader and ConfigWriter traits
...
Only PciFunc implements this trait.
2024-06-09 18:51:55 +02:00
bjorn3
9aed7d560e
pcid: Merge CapabilityOffsetsIter into CapabilitiesIter
2024-06-09 18:21:50 +02:00
bjorn3
67d3015e2e
Add helper for allocating a single MSI/MSI-X interrupt vector
...
It doesn't actually configure the device to emit it though, but does
make this easier to do.
2024-01-25 14:43:44 +01:00
bjorn3
ecdcefba69
Clarify message_address argument names
2024-01-24 14:28:40 +01:00
bjorn3
f43aa8574c
Simplify MSI-X table pointer computation
2024-01-24 14:28:40 +01:00
bjorn3
7dbf22331b
Share msix config validation code
2024-01-24 14:28:40 +01:00
bjorn3
354c351b19
Unify device info printing between drivers
2024-01-23 13:01:40 +01:00
bjorn3
77b97bb2ed
Introduce PciBar::physmap_mem helper
2024-01-23 12:02:40 +01:00
bjorn3
4302a35a7e
Remove a couple of unused functions from MsixCapability
...
The set and write methods were useless as no rpc call is exposed by
pcid to actually write the new values. As for the rest, there were
no uses and they can be emulated using the other methods.
2024-01-22 20:44:17 +01:00
bjorn3
18529f6cee
Remove PciClass in favor of pci_types::DeviceType
2024-01-22 16:57:53 +01:00
bjorn3
a5d0c7c354
Use pci_types for reading BARs
...
This simplifies a lot of code and adds support for 64bit BARs.
2024-01-22 15:54:18 +01:00
bjorn3
0b611dca04
Start using the pci_types crate
2024-01-22 11:25:43 +01:00
bjorn3
cc015eab13
Move PciHeader out of the pcid_interface crate
2024-01-21 21:25:50 +01:00
bjorn3
5192816de7
Introduce expect_port and expect_mem helpers
2024-01-21 21:12:24 +01:00
bjorn3
e5772c132b
Remove a lot of fields from PciHeader which are unlikely to be used
...
Some of these are removed with PCIe while many others only need to be
used by the firmware to initialize the PCI bridges. If we ever need
them anyway, we can always add them back, but for now it improves
readability.
2024-01-21 19:12:35 +01:00
bjorn3
1890293e86
Introduce a FullDeviceId type and pass it in pcid_interface
2024-01-21 15:18:56 +01:00
bjorn3
dc13752d74
Force usage of pcid_interface
2024-01-20 19:42:06 +01:00
bjorn3
d832717bf9
Remove a bit of dead code
2024-01-20 14:42:29 +01:00
bjorn3
3cbfbf6442
Move the IO port based fallback for PCI out of the pci module
...
The pci module is included in the pcid_interface library, which never
needs it.
2024-01-20 14:07:31 +01:00
bjorn3
4f20b90fc3
Remove PciBus and PciDev types
...
They weren't used in a load bearing way. If we want to keep persistent
state about buses and devices in the future they would probably get a
different shape.
2024-01-20 13:38:45 +01:00
bjorn3
cb9edcb7d6
Reduce log verbosity of Capability::parse_vendor by combining some logs
2024-01-19 19:11:05 +01:00
bjorn3
d010d03eef
Fix pcid tests
2024-01-19 12:40:55 +01:00
bjorn3
2b5ed69a06
Use PciAddress in a couple more places
2024-01-19 12:40:54 +01:00
bjorn3
42b2f52d41
Directly store a PciAddress inside PciFunc instead of a PciDev + num
2024-01-19 12:29:22 +01:00
bjorn3
e5491a9e9a
Inline several layers of read and write methods
2024-01-19 12:21:22 +01:00
bjorn3
336903b90a
Introduce SharedPciHeader to deduplicate fields between the General and PciToPci variants
2024-01-19 12:14:02 +01:00
bjorn3
a7c5391c6c
Introduce PciAddress type copied from the pci_types crate
2024-01-19 12:14:00 +01:00
bjorn3
07d5d730d2
Remove nolock CfgAccess methods
...
They are only called by the corresponding locked methods.
2024-01-18 22:14:04 +01:00
Anhad Singh
7e5a3196c2
pcid::server_handle: add get_capabilities
...
This commit adds the `get_capabilities` function to `PcidServerHandle`
which returns all of the `Capability`s (raw representation) of the PCI
device.
Signed-off-by: Anhad Singh <andypython@protonmail.com >
2023-06-19 12:18:56 +10:00
Jeremy Soller
a6bafa17b0
Add pcid methods to read/write pci config region
2022-09-12 21:47:16 -06:00
Jeremy Soller
e2a8255547
Allow reading PCI header through pcid socket
2022-09-07 12:15:41 -06:00
Jeremy Soller
0e85c01ea3
Implement 64-bit BARs
2022-08-31 08:46:53 -06:00
Jeremy Soller
da8ecef8a7
Workarounds for aarch64 support
2022-07-26 16:11:45 -06:00
4lDO2
d426ffacea
Update toolchain to 2022-03-18.
2022-03-19 15:06:29 +01:00
Jeremy Soller
5e42b0697e
Skip parsing vendor caps with length 0
2022-02-11 09:23:48 -07:00
Jeremy Soller
31bae74334
Merge branch 'code_hygiene' into 'master'
...
Code hygiene
See merge request redox-os/drivers!72
2020-08-08 12:55:24 +00:00
Jeremy Soller
be101621cc
Update to newer syscall
2020-08-02 15:25:03 -06:00
Wren Turkal
6018b6fc49
Fix lint issues from rustc.
...
Signed-off-by: Wren Turkal <wt@penguintechs.org >
2020-08-01 16:52:47 -07:00
Wren Turkal
dadc0c6c10
Remove unused imports.
...
Signed-off-by: Wren Turkal <wt@penguintechs.org >
2020-08-01 12:48:06 -07:00
Jeremy Soller
63dc11fbb9
Merge branch 'add_pci_vendor_specific_capability' into 'master'
...
Add pci vendor specific capability.
See merge request redox-os/drivers!71
2020-08-01 18:18:31 +00:00
Wren Turkal
39fea64403
Add pci vendor specific capability.
...
Signed-off-by: Wren Turkal <wt@penguintechs.org >
2020-08-01 00:40:30 -07:00
Wren Turkal
5db50db7a9
Fix buggy assertion in pcid capability parser.
...
The pcid capability parsing code has an assertion that checks for dword
alignment. Unfortunately, the check was previously checking for
alignment to qwords. This fixes that.
I found this issue by using qemu to emulate adding different pci
devices. I managed to come across a device that had a capability
aligned on dword, but not qword. That exposed the bug.
Signed-off-by: Wren Turkal <wt@penguintechs.org >
2020-07-31 21:39:21 -07:00
Wren Turkal
5dfd5f7e7c
Fixed PCI bus scan to scan bus 0xFF.
...
Previously, the PCI bus scan was skipping bus 0xFF. Now it does not.
I used a match expression to make sure that all cases are accounted for.
I also changed the PCI dev scan and PCI func scan to use a match
expression in a similar way to make sure all cases are account. While
this is functionally the same as before, the match expression will not
allow unhandled cases and should be easier to read and make it harder
to introduce bugs.
Signed-off-by: Wren Turkal <wt@penguintechs.org >
2020-07-27 22:49:39 -07:00
4lDO2
146265682a
Improved PCI capability parsing.
2020-05-21 12:16:22 +00:00