pcid::server_handle: add get_capabilities
This commit adds the `get_capabilities` function to `PcidServerHandle` which returns all of the `Capability`s (raw representation) of the PCI device. Signed-off-by: Anhad Singh <andypython@protonmail.com>
This commit is contained in:
@@ -7,8 +7,9 @@ use std::os::unix::io::{FromRawFd, RawFd};
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use serde::{Serialize, Deserialize, de::DeserializeOwned};
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use thiserror::Error;
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pub use crate::pci::{PciBar, PciHeader};
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pub use crate::pci::cap::Capability;
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pub use crate::pci::msi;
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pub use crate::pci::{PciBar, PciHeader};
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pub mod irq_helpers;
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@@ -171,6 +172,7 @@ pub enum PcidClientRequest {
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RequestConfig,
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RequestHeader,
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RequestFeatures,
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RequestCapabilities,
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EnableFeature(PciFeature),
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FeatureStatus(PciFeature),
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FeatureInfo(PciFeature),
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@@ -189,6 +191,7 @@ pub enum PcidServerResponseError {
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#[derive(Debug, Serialize, Deserialize)]
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#[non_exhaustive]
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pub enum PcidClientResponse {
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Capabilities(Vec<Capability>),
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Config(SubdriverArguments),
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Header(PciHeader),
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AllFeatures(Vec<(PciFeature, FeatureStatus)>),
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@@ -258,6 +261,16 @@ impl PcidServerHandle {
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other => Err(PcidClientHandleError::InvalidResponse(other)),
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}
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}
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pub fn get_capabilities(&mut self) -> Result<Vec<Capability>> {
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self.send(&PcidClientRequest::RequestCapabilities)?;
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match self.recv()? {
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PcidClientResponse::Capabilities(a) => Ok(a),
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other => Err(PcidClientHandleError::InvalidResponse(other)),
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}
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}
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pub fn fetch_header(&mut self) -> Result<PciHeader> {
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self.send(&PcidClientRequest::RequestHeader)?;
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match self.recv()? {
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@@ -66,6 +66,9 @@ impl DriverHandler {
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use crate::pci::cap::{MsiCapability, MsixCapability};
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match request {
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PcidClientRequest::RequestCapabilities => {
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PcidClientResponse::Capabilities(self.capabilities.iter().map(|(_, capability)| capability.clone()).collect::<Vec<_>>())
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}
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PcidClientRequest::RequestConfig => {
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PcidClientResponse::Config(args.clone())
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}
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+2
-2
@@ -80,7 +80,7 @@ pub enum MsiCapability {
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}
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#[derive(Clone, Copy, Debug, Eq, Hash, PartialEq)]
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#[derive(Clone, Copy, Debug, Eq, Hash, PartialEq, Serialize, Deserialize)]
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pub struct PcieCapability {
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pub pcie_caps: u32,
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pub dev_caps: u32,
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@@ -117,7 +117,7 @@ pub struct VendorSpecificCapability {
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pub data: Vec<u8>,
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}
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#[derive(Clone, Debug, Eq, Hash, PartialEq)]
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#[derive(Clone, Debug, Eq, Hash, PartialEq, Serialize, Deserialize)]
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pub enum Capability {
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Msi(MsiCapability),
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MsiX(MsixCapability),
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