pcid::server_handle: add get_capabilities

This commit adds the `get_capabilities` function to `PcidServerHandle`
which returns all of the `Capability`s (raw representation) of the PCI
device.

Signed-off-by: Anhad Singh <andypython@protonmail.com>
This commit is contained in:
Anhad Singh
2023-06-19 12:14:49 +10:00
parent 1580cb8c83
commit 7e5a3196c2
3 changed files with 19 additions and 3 deletions
+14 -1
View File
@@ -7,8 +7,9 @@ use std::os::unix::io::{FromRawFd, RawFd};
use serde::{Serialize, Deserialize, de::DeserializeOwned};
use thiserror::Error;
pub use crate::pci::{PciBar, PciHeader};
pub use crate::pci::cap::Capability;
pub use crate::pci::msi;
pub use crate::pci::{PciBar, PciHeader};
pub mod irq_helpers;
@@ -171,6 +172,7 @@ pub enum PcidClientRequest {
RequestConfig,
RequestHeader,
RequestFeatures,
RequestCapabilities,
EnableFeature(PciFeature),
FeatureStatus(PciFeature),
FeatureInfo(PciFeature),
@@ -189,6 +191,7 @@ pub enum PcidServerResponseError {
#[derive(Debug, Serialize, Deserialize)]
#[non_exhaustive]
pub enum PcidClientResponse {
Capabilities(Vec<Capability>),
Config(SubdriverArguments),
Header(PciHeader),
AllFeatures(Vec<(PciFeature, FeatureStatus)>),
@@ -258,6 +261,16 @@ impl PcidServerHandle {
other => Err(PcidClientHandleError::InvalidResponse(other)),
}
}
pub fn get_capabilities(&mut self) -> Result<Vec<Capability>> {
self.send(&PcidClientRequest::RequestCapabilities)?;
match self.recv()? {
PcidClientResponse::Capabilities(a) => Ok(a),
other => Err(PcidClientHandleError::InvalidResponse(other)),
}
}
pub fn fetch_header(&mut self) -> Result<PciHeader> {
self.send(&PcidClientRequest::RequestHeader)?;
match self.recv()? {
+3
View File
@@ -66,6 +66,9 @@ impl DriverHandler {
use crate::pci::cap::{MsiCapability, MsixCapability};
match request {
PcidClientRequest::RequestCapabilities => {
PcidClientResponse::Capabilities(self.capabilities.iter().map(|(_, capability)| capability.clone()).collect::<Vec<_>>())
}
PcidClientRequest::RequestConfig => {
PcidClientResponse::Config(args.clone())
}
+2 -2
View File
@@ -80,7 +80,7 @@ pub enum MsiCapability {
}
#[derive(Clone, Copy, Debug, Eq, Hash, PartialEq)]
#[derive(Clone, Copy, Debug, Eq, Hash, PartialEq, Serialize, Deserialize)]
pub struct PcieCapability {
pub pcie_caps: u32,
pub dev_caps: u32,
@@ -117,7 +117,7 @@ pub struct VendorSpecificCapability {
pub data: Vec<u8>,
}
#[derive(Clone, Debug, Eq, Hash, PartialEq)]
#[derive(Clone, Debug, Eq, Hash, PartialEq, Serialize, Deserialize)]
pub enum Capability {
Msi(MsiCapability),
MsiX(MsixCapability),