bjorn3
4f20b90fc3
Remove PciBus and PciDev types
...
They weren't used in a load bearing way. If we want to keep persistent
state about buses and devices in the future they would probably get a
different shape.
2024-01-20 13:38:45 +01:00
bjorn3
cf7fbacdaf
Stop leaking Mcfg again
...
We don't need it after Pcie::new anymore
2024-01-19 19:53:39 +01:00
bjorn3
529b4935ee
Physmap all buses upfront
...
This avoids a costly Mutex lock and BTreeMap lookup for each config
space access.
2024-01-19 19:50:11 +01:00
bjorn3
23d963361a
Fix a couple of warnings
2024-01-19 19:14:22 +01:00
bjorn3
cb9edcb7d6
Reduce log verbosity of Capability::parse_vendor by combining some logs
2024-01-19 19:11:05 +01:00
bjorn3
8d87b701ba
Remove Mcfgs type
...
This wrapper was only useful back when we accepted multiple MCFG tables.
2024-01-19 19:10:35 +01:00
bjorn3
ae7e2dac9f
Only parse a single MCFG ACPI table
...
There should only be one and Linux only parses the first one too.
2024-01-19 18:41:28 +01:00
bjorn3
07c029ec21
Add a fixme for using ACPI
2024-01-19 18:10:57 +01:00
bjorn3
101f062b56
Remove a couple of error conditions in Mcfgs::fetch()
...
* Every directory entry has to have a filename, so use unwrap
* Handle non-UTF-8 ACPI table filenames by using as_encoded_bytes
2024-01-19 14:58:09 +01:00
bjorn3
240e59e2bf
Handle pci buses without a device at the first slot
2024-01-19 14:45:48 +01:00
bjorn3
c611988768
Fix MCFG parsing for PCIe
2024-01-19 13:19:53 +01:00
bjorn3
b317484d67
Simplify Mcfgs::fetch
2024-01-19 13:00:23 +01:00
bjorn3
15249127a5
Fix a couple of warnings
2024-01-19 12:47:42 +01:00
bjorn3
d010d03eef
Fix pcid tests
2024-01-19 12:40:55 +01:00
bjorn3
2b5ed69a06
Use PciAddress in a couple more places
2024-01-19 12:40:54 +01:00
bjorn3
42b2f52d41
Directly store a PciAddress inside PciFunc instead of a PciDev + num
2024-01-19 12:29:22 +01:00
bjorn3
e5491a9e9a
Inline several layers of read and write methods
2024-01-19 12:21:22 +01:00
bjorn3
336903b90a
Introduce SharedPciHeader to deduplicate fields between the General and PciToPci variants
2024-01-19 12:14:02 +01:00
bjorn3
a7c5391c6c
Introduce PciAddress type copied from the pci_types crate
2024-01-19 12:14:00 +01:00
bjorn3
07d5d730d2
Remove nolock CfgAccess methods
...
They are only called by the corresponding locked methods.
2024-01-18 22:14:04 +01:00
Jeremy Soller
61e9512468
Update redox_syscall to 0.4
2023-09-07 20:49:37 -06:00
4lDO2
ba661f9719
Replace SYS_PIPE2 with libc::pipe in pcid.
2023-08-31 21:20:23 +02:00
Ron Williams
156be64a9d
pcid: replace add that should allow wrapping with explicit wrapping_add
2023-07-27 01:22:56 -07:00
4lDO2
e0a0e2a532
Remove physmap in pcid.
2023-07-18 11:01:16 +02:00
Anhad Singh
7e5a3196c2
pcid::server_handle: add get_capabilities
...
This commit adds the `get_capabilities` function to `PcidServerHandle`
which returns all of the `Capability`s (raw representation) of the PCI
device.
Signed-off-by: Anhad Singh <andypython@protonmail.com >
2023-06-19 12:18:56 +10:00
4lDO2
a5a3f3341f
Remove all usages of physunmap.
2023-06-11 11:33:27 +02:00
Jeremy Soller
96246acca5
pcid: Optimize PCI bus scanning
2023-02-15 20:05:25 -07:00
Jeremy Soller
5bbe2e3f4c
ahci, ihda, pci, xhci: logging adjustments
2023-02-15 19:30:59 -07:00
Jeremy Soller
625064004d
Update for new Rust nightly
2023-02-11 14:37:22 -07:00
Jeremy Soller
a6bafa17b0
Add pcid methods to read/write pci config region
2022-09-12 21:47:16 -06:00
Jeremy Soller
e2a8255547
Allow reading PCI header through pcid socket
2022-09-07 12:15:41 -06:00
Jeremy Soller
4bca3e55d3
Fix xhcid compilation
2022-08-31 08:49:39 -06:00
Jeremy Soller
0e85c01ea3
Implement 64-bit BARs
2022-08-31 08:46:53 -06:00
4lDO2
af873f7626
Update redox_syscall dependency.
2022-07-27 17:55:39 +02:00
4lDO2
21e30b7339
Replace syscall::clone() with libc::fork().
2022-07-27 16:25:01 +02:00
Jeremy Soller
da8ecef8a7
Workarounds for aarch64 support
2022-07-26 16:11:45 -06:00
4lDO2
07f10fb4d1
Update redox_syscall to v0.2.12
2022-03-24 16:06:00 +01:00
4lDO2
d426ffacea
Update toolchain to 2022-03-18.
2022-03-19 15:06:29 +01:00
Jeremy Soller
5e42b0697e
Skip parsing vendor caps with length 0
2022-02-11 09:23:48 -07:00
4lDO2
7a2b3d7656
Update dependencies.
2021-06-17 18:18:27 +02:00
4lDO2
00b7674321
Use correct syscall when dropping PCIe context.
2021-03-08 14:37:38 +01:00
Jeremy Soller
31bae74334
Merge branch 'code_hygiene' into 'master'
...
Code hygiene
See merge request redox-os/drivers!72
2020-08-08 12:55:24 +00:00
Jeremy Soller
be101621cc
Update to newer syscall
2020-08-02 15:25:03 -06:00
Wren Turkal
6018b6fc49
Fix lint issues from rustc.
...
Signed-off-by: Wren Turkal <wt@penguintechs.org >
2020-08-01 16:52:47 -07:00
Wren Turkal
dadc0c6c10
Remove unused imports.
...
Signed-off-by: Wren Turkal <wt@penguintechs.org >
2020-08-01 12:48:06 -07:00
Jeremy Soller
63dc11fbb9
Merge branch 'add_pci_vendor_specific_capability' into 'master'
...
Add pci vendor specific capability.
See merge request redox-os/drivers!71
2020-08-01 18:18:31 +00:00
Jeremy Soller
7b8485a582
Merge branch 'pci_ids_info' into 'master'
...
Add more structure cli to pcid.
See merge request redox-os/drivers!67
2020-08-01 18:16:31 +00:00
Wren Turkal
65982d5e02
Add more structure cli to pcid.
...
This change adds a structopt commandline interface to the pcid tool.
This add some help for the arguments that pcid takes.
Signed-off-by: Wren Turkal <wt@penguintechs.org >
2020-08-01 18:16:31 +00:00
Wren Turkal
39fea64403
Add pci vendor specific capability.
...
Signed-off-by: Wren Turkal <wt@penguintechs.org >
2020-08-01 00:40:30 -07:00
Wren Turkal
5db50db7a9
Fix buggy assertion in pcid capability parser.
...
The pcid capability parsing code has an assertion that checks for dword
alignment. Unfortunately, the check was previously checking for
alignment to qwords. This fixes that.
I found this issue by using qemu to emulate adding different pci
devices. I managed to come across a device that had a capability
aligned on dword, but not qword. That exposed the bug.
Signed-off-by: Wren Turkal <wt@penguintechs.org >
2020-07-31 21:39:21 -07:00