intel: fix critical register constants (MISCCPCTL, MOD_CTRL, L3NODEARBCFG, SQCNT1, SARB, VDBOX offsets)

This commit is contained in:
2026-06-03 09:33:36 +03:00
parent 52f589e31d
commit 428def66e3
@@ -261,19 +261,19 @@ pub const GEN11_SUBSLICE_UNIT_LEVEL_CLKGATE: usize = 0x9524;
pub const GEN11_SLICE_UNIT_LEVEL_CLKGATE: usize = 0x94D4;
pub const SUBSLICE_UNIT_LEVEL_CLKGATE2: usize = 0x9528;
pub const VSUNIT_CLKGATE_DIS_TGL: u32 = 1 << 19;
pub const SARB_CHICKEN1: usize = 0xB01C;
pub const GEN7_MISCCPCTL: usize = 0x9488;
pub const RENDER_MOD_CTRL: usize = 0xB0D4;
pub const COMP_MOD_CTRL: usize = 0xB0D8;
pub const XEHP_VDBX_MOD_CTRL: usize = 0xB0DC;
pub const XEHP_VEBX_MOD_CTRL: usize = 0xB0E0;
pub const XEHP_GAMCNTRL_CTRL: usize = 0xB0E4;
pub const XEHP_L3NODEARBCFG: usize = 0xB0E8;
pub const GEN12_SQCNT1: usize = 0xB0F0;
pub const XELPMP_GSC_MOD_CTRL: usize = 0xB0F4;
pub const XELPMP_VDBX_MOD_CTRL: usize = 0xB0F8;
pub const VDBOX_CGCTL3F10: usize = 0xB0FC;
pub const VDBOX_CGCTL3F1C: usize = 0xB100;
pub const SARB_CHICKEN1: usize = 0xE90C;
pub const GEN7_MISCCPCTL: usize = 0x9424;
pub const RENDER_MOD_CTRL: usize = 0xCF2C;
pub const COMP_MOD_CTRL: usize = 0xCF30;
pub const XEHP_VDBX_MOD_CTRL: usize = 0xCF34;
pub const XEHP_VEBX_MOD_CTRL: usize = 0xCF38;
pub const XEHP_GAMCNTRL_CTRL: usize = 0xCF54;
pub const XEHP_L3NODEARBCFG: usize = 0xB0B4;
pub const GEN12_SQCNT1: usize = 0x8718;
pub const XELPMP_GSC_MOD_CTRL: usize = 0xCF30;
pub const XELPMP_VDBX_MOD_CTRL: usize = 0xCF34;
pub const VDBOX_CGCTL3F10: usize = 0x3F10;
pub const VDBOX_CGCTL3F1C: usize = 0x3F1C;
pub const GEN12_FF_MODE2: usize = 0x6604;
pub const XEHP_L3SQCREG5: usize = 0xB158;
pub const XEHP_L3SCQREG7: usize = 0xB188;