vasilito
845ae99f9d
Three fixes for the KWin DRM device discovery failure: 1. drm_scheme_ready(): replace head -c 1 with exec 3< open test. Reading from a DRM scheme fd blocks because the scheme expects ioctl-style request/response, not streaming reads. Use open() success as the scheme availability probe instead. 2. ConsoleKitSession::create(): return nullptr immediately. The D-Bus isServiceRegistered() call can block indefinitely when the bus daemon doesn't fully implement org.freedesktop.DBus. With both LogindSession and ConsoleKitSession returning nullptr, Session::create() falls through to NoopSession which uses plain open() for DRM device access. 3. Boot chain deps: redox-drm depends on driver-manager, greeter depends on evdevd (keyboard/mouse ready before login). Also includes: KF6 CMake build fixes, Qt6 platform patches, libdrm Redox ioctl shim, and wayland.toml scheme check fix.
133 lines
2.7 KiB
C
133 lines
2.7 KiB
C
#ifndef _VIRTGPU_DRM_H_
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#define _VIRTGPU_DRM_H_
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#include <stdint.h>
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#define DRM_VIRTGPU_MAP 0x41
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#define DRM_VIRTGPU_EXECBUFFER 0x42
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#define DRM_VIRTGPU_GETPARAM 0x43
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#define DRM_VIRTGPU_RESOURCE_CREATE 0x44
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#define DRM_VIRTGPU_RESOURCE_INFO 0x45
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#define DRM_VIRTGPU_TRANSFER_FROM_HOST 0x46
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#define DRM_VIRTGPU_TRANSFER_TO_HOST 0x47
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#define DRM_VIRTGPU_WAIT 0x48
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#define DRM_VIRTGPU_GET_CAPS 0x49
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#define DRM_VIRTGPU_RESOURCE_CREATE_BLOB 0x4A
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#define DRM_VIRTGPU_CONTEXT_INIT 0x4B
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#define drm_virtgpu_resource_create drm_virtgpu_resource_create_3d
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#define drm_virtgpu_3d_transfer_to_host drm_virtgpu_transfer_to_host
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#define drm_virtgpu_3d_transfer_from_host drm_virtgpu_transfer_from_host
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#define drm_virtgpu_3d_wait drm_virtgpu_wait_3d
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#define ctx_set_params_ptr ctx_set_params
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#define resource_id res_handle
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struct drm_virtgpu_3d_box {
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uint32_t x;
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uint32_t y;
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uint32_t z;
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uint32_t w;
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uint32_t h;
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uint32_t d;
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};
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struct drm_virtgpu_execbuffer {
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uint32_t flags;
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uint32_t size;
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uint64_t command;
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uint64_t bo_handles;
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uint32_t num_bo_handles;
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int32_t fence_fd;
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uint32_t ring_idx;
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uint32_t syncobj_stride;
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uint32_t num_in_syncobjs;
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uint32_t num_out_syncobjs;
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uint64_t in_syncobjs;
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uint64_t out_syncobjs;
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};
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struct drm_virtgpu_getparam {
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uint64_t param;
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uint64_t value;
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};
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struct drm_virtgpu_resource_create_3d {
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uint32_t target;
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uint32_t format;
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uint32_t bind;
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uint32_t width;
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uint32_t height;
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uint32_t depth;
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uint32_t array_size;
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uint32_t last_level;
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uint32_t nr_samples;
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uint32_t flags;
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uint32_t bo_handle;
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uint32_t res_handle;
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uint32_t size;
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uint32_t stride;
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};
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struct drm_virtgpu_resource_info {
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uint32_t bo_handle;
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uint32_t res_handle;
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uint32_t size;
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uint32_t blob_mem;
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};
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struct drm_virtgpu_transfer_to_host {
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uint32_t bo_handle;
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struct drm_virtgpu_3d_box box;
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uint32_t level;
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uint32_t offset;
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uint32_t stride;
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uint32_t layer_stride;
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};
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struct drm_virtgpu_transfer_from_host {
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uint32_t bo_handle;
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struct drm_virtgpu_3d_box box;
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uint32_t level;
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uint32_t offset;
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uint32_t stride;
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uint32_t layer_stride;
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};
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struct drm_virtgpu_wait_3d {
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uint32_t handle;
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uint32_t flags;
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};
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struct drm_virtgpu_get_caps {
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uint32_t cap_set_id;
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uint32_t cap_set_ver;
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uint64_t addr;
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uint32_t size;
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uint32_t pad;
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};
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struct drm_virtgpu_resource_create_blob {
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uint32_t blob_mem;
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uint32_t blob_flags;
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uint32_t bo_handle;
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uint32_t res_handle;
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uint64_t size;
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uint32_t pad;
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uint32_t cmd_size;
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uint64_t cmd;
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uint64_t blob_id;
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};
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struct drm_virtgpu_context_set_param {
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uint64_t param;
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uint64_t value;
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};
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struct drm_virtgpu_context_init {
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uint32_t num_params;
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uint32_t pad;
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uint64_t ctx_set_params;
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};
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#endif
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