b0b0ec2d71
Deduplicate definition of FLAG_SINGLESTEP between x86 and x86_64
2026-04-09 15:23:34 -06:00
ee1260363c
Fix many clippy lints
2026-04-08 19:40:41 +01:00
d029ccfe20
Deduplicate a bunch of serial port initialization between arm64 and riscv
2026-04-04 16:36:30 +02:00
62f220b1b9
Use cfg! rather than #[cfg] for ACPI enabling
2026-04-04 13:49:07 +02:00
7aa7aa463f
Use map_device_memory where possible
2026-04-04 13:10:05 +02:00
dee230ffca
Use map_linearly in many places
2026-04-04 13:10:04 +02:00
1352fafd00
Remove unused InactiveFlusher
2026-04-03 22:15:00 +02:00
ab4abf63c9
Deduplicate Page and other paging related things between architectures
2026-04-03 22:15:00 +02:00
b805336cfc
Fix a bunch of warnings
2026-04-03 22:15:00 +02:00
3cbce1b9ac
Move BSP_READY and AP_READY to platform-independent code
2026-04-02 20:29:36 +02:00
49eb21ce0e
Use KERNEL_OFFSET from linker script
2026-04-02 20:29:36 +02:00
dc7e823f70
Deduplicate kernel page flags
2026-04-02 20:29:36 +02:00
980f1c6af8
Remove unused and deduplicate identical arch specific consts
2026-04-02 20:29:36 +02:00
10b1ae2ecc
Remove unused arch consts
2026-04-02 20:29:36 +02:00
2ce7621a80
Fix a bunch of warnings masked by #[allow(unused)]
2026-04-02 20:29:36 +02:00
c8879531ae
rmm: Add device_memory and uncachable flags to PageFlags
2026-03-30 20:34:45 +02:00
6b00f4ca25
Move MAIR_EL1 initialization to rmm
...
Rmm needs to know the exact MAIR_EL1 configuration to produce the
correct bits in the page table.
2026-03-30 19:26:41 +02:00
6e5c25b7a0
Move PAT initialization to rmm
...
Rmm needs to know the exact PAT configuration to produce the correct
bits in the page table.
2026-03-30 18:59:42 +02:00
c4b064ea44
Move arch specific EntryFlags into rmm
2026-03-30 18:49:15 +02:00
8b217edac0
Fix two unsafe block related warnings
2026-03-30 18:42:38 +02:00
2fc2d5897a
Fix a couple of unused import warnings
2026-03-30 18:38:25 +02:00
c51aa1ef86
rmm: Make a couple of methods safe
2026-03-29 14:16:53 +02:00
abf710b4a2
Move handling of kernel page table entry copying to RMM
...
This way it can ensure those page table entries never get unmapped,
ensuring they are kept in sync between all processes.
2026-03-29 14:16:53 +02:00
604e1729cb
Rustfmt
2026-03-29 14:16:53 +02:00
b5603422be
Check at compile time that KernelMapper is writable if necessary
2026-03-28 23:22:19 +01:00
5865ec0790
/scheme/sys/cpu: Add aarch64 feature detection
...
This only lists features from ID_AA64ISAR0_EL1 and ID_AA64ISAR1_EL1.
For other features one would have to evaluate more registers.
2026-03-26 22:15:03 +01:00
2d5e2b39f5
Drop extra debug print
2026-03-26 00:49:33 +01:00
a60cc25015
Update aarch64 implementers list
...
Two vendors were missing compared to ARM's official list.
https://developer.arm.com/documentation/ddi0601/2025-12/AArch64-Registers/MIDR-EL1--Main-ID-Register
2026-03-26 00:49:11 +01:00
8f468ec106
syscall: remove comment about test vs bt x86 instructions
...
According to Agner Fog's documentation
(https://agner.org/optimize/instruction_tables.pdf ), the following information
is true:
These instructions have identical latency and throughput, except for Zen
5, which lists `test` as having reciprocal throughput of 0.25 cycles,
and `bt` having reciprocal throughput of 0.33 cycles. This rules out the
`bt` instruction for being the ideal instruction.
The other `test` instructions were removed as candidates because,
regardless of the size of the memory fetched at the address, at least 64
bytes will need to be fetched because it will be stored in the cache
line. The WORD and DWORD cases can be ruled out because we cannot assume
that `rsp + 16` or `rsp + 17` will not be on a 64-byte alignment
boundary, which would cause two cachelines to be essentially filled with
garbage we don't care about. The best case scenario is that we only need
to fill one cache line with garbage, which is what the BYTE version does
every time.
2026-03-12 09:41:29 -05:00
c4e86bfffd
Change time offset to RwLock
2026-03-10 05:58:26 +07:00
14b8c2b0c1
enforce two lints and collapse some ifs
2026-03-03 14:51:32 +00:00
f7b0f5ec37
eliminate an unwrap in gdt for x86_shared
2026-03-02 10:56:28 +00:00
3c2b1a11c5
Add ordered lock for time offset mutex
2026-02-25 11:42:17 +07:00
858b712df5
Use naked_asm!() instead of global_asm!() where possible
2026-02-09 22:28:38 +01:00
d51fe0c7e0
Avoid concat!() in inline asm
...
It is no longer necessary in modern rustc versions.
2026-02-09 22:12:20 +01:00
5ac00f5533
Remove namespace management from the kernel.
2026-01-20 20:43:34 -07:00
a919d2626b
Inline Documentation Fixes
2026-01-10 16:19:34 -07:00
92132132c1
Implement clock_getres and handle path to time scheme
2025-12-21 05:24:13 +07:00
e30ed9ab6a
Introduce syscall6. Add unlinkat and remove unlink and rmdir.
2025-12-17 18:31:04 -07:00
7ffc046d46
Enable serial interrupts on aarch64 ACPI
2025-11-21 08:39:38 -07:00
01ec650b1e
Add support for userspace stack traces using usercopy
2025-11-10 08:54:06 -07:00
91b835d29f
Reduce logging significantly
2025-11-01 20:24:11 -06:00
3b1fd27431
Remove byteorder dependency
2025-10-26 12:43:08 -06:00
0f7b16d89d
Partially use cfg!() rather than #[cfg] for controlling the profiling module
...
This only adds a pointer worth of overhead per cpu core in the
PerCpuBlock struct.
Also fix a bunch of unsafe_op_in_unsafe_fn warnings in the profiling
code.
2025-10-26 18:27:29 +01:00
1498376360
Unify generic irq handling between x86 and x86_64
2025-10-25 19:44:03 +02:00
e8acd82074
Directly define __usercopy_{start,end} in the usercopy functions
...
As opposed to requiring a linker script
2025-10-25 19:12:27 +02:00
021cdf47f4
Fix a bunch of warnings
2025-10-19 14:27:43 +02:00
9d5ad06b30
Move some code from the trampoline to global_asm!()
2025-10-19 06:23:39 -06:00
4b16e66164
Set arm64 exception handler before entering the rust world
2025-10-19 06:23:39 -06:00
d31e552d08
Set riscv exception handler before entering the rust world
2025-10-19 06:23:39 -06:00
bjorn3