Format

src/arch/aarch64/device/generic_timer.rs

@@ -102,7 +102,6 @@ impl GenericTimer {
 
 impl InterruptHandler for GenericTimer {
     fn irq_handler(&mut self, irq: u32) {
-
         self.clear_irq();
         {
             *time::OFFSET.lock() += self.clk_freq as u128;

src/arch/aarch64/device/irqchip/irq_bcm2835.rs

@@ -87,7 +87,10 @@ impl Bcm2835ArmInterruptController {
                 .ic
                 .irq_xlate(irq)
                 .unwrap();
-            info!("register bcm2835arm_ctrl as ic_idx {}'s child  virq = {}", ic_idx, virq);
+            info!(
+                "register bcm2835arm_ctrl as ic_idx {}'s child  virq = {}",
+                ic_idx, virq
+            );
             ret_virq = Some(virq);
         }
         Ok((base as usize, size as usize, ret_virq))

src/arch/aarch64/device/irqchip/irq_bcm2836.rs

@@ -1,11 +1,15 @@
 use super::InterruptController;
-use crate::{arch::device::{ROOT_IC_IDX, ROOT_IC_IDX_IS_SET}, dtb::{
-    get_mmio_address,
-    irqchip::{InterruptHandler, IrqCell, IrqDesc},
-}};
+use crate::{
+    arch::device::{ROOT_IC_IDX, ROOT_IC_IDX_IS_SET},
+    dtb::{
+        get_mmio_address,
+        irqchip::{InterruptHandler, IrqCell, IrqDesc},
+    },
+};
 use core::{
     arch::asm,
-    ptr::{read_volatile, write_volatile}, sync::atomic::Ordering,
+    ptr::{read_volatile, write_volatile},
+    sync::atomic::Ordering,
 };
 use fdt::{node::FdtNode, Fdt};
 use log::{debug, info};

src/arch/aarch64/device/mod.rs

@@ -16,12 +16,11 @@ pub static ROOT_IC_IDX: AtomicUsize = AtomicUsize::new(0);
 pub static ROOT_IC_IDX_IS_SET: AtomicUsize = AtomicUsize::new(0);
 
 unsafe fn init_root_ic(fdt: &Fdt) {
-
     let is_set = ROOT_IC_IDX_IS_SET.load(Ordering::Relaxed);
     if is_set != 0 {
         let ic_idx = ROOT_IC_IDX.load(Ordering::Relaxed);
         info!("Already selected {} as root ic", ic_idx);
-        return ;
+        return;
     }
 
     let root_irqc_phandle = fdt