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rmm: Remove magic constants for x86 PAT indices

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bjorn3
2026-03-30 21:02:54 +02:00
parent c8879531ae
commit efa6b00189
3 changed files with 13 additions and 6 deletions
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rmm/src/arch/x86.rs
+3 -3
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@@ -25,9 +25,9 @@ impl Arch for X86Arch {
const ENTRY_FLAG_NO_GLOBAL: usize = 0;
const ENTRY_FLAG_NO_EXEC: usize = 0; // NOT AVAILABLE UNLESS PAE IS USED!
const ENTRY_FLAG_EXEC: usize = 0;
const ENTRY_FLAG_DEVICE_MEMORY: usize = 1 << 4;
const ENTRY_FLAG_UNCACHEABLE: usize = 1 << 4;
const ENTRY_FLAG_WRITE_COMBINING: usize = 1 << 7;
const ENTRY_FLAG_DEVICE_MEMORY: usize = PAT_UC_;
const ENTRY_FLAG_UNCACHEABLE: usize = PAT_UC_;
const ENTRY_FLAG_WRITE_COMBINING: usize = PAT_WC;
const PHYS_OFFSET: usize = 0x8000_0000;
rmm/src/arch/x86_64.rs
+3 -3
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@@ -24,9 +24,9 @@ impl Arch for X8664Arch {
const ENTRY_FLAG_NO_GLOBAL: usize = 0;
const ENTRY_FLAG_NO_EXEC: usize = 1 << 63;
const ENTRY_FLAG_EXEC: usize = 0;
const ENTRY_FLAG_DEVICE_MEMORY: usize = 1 << 4;
const ENTRY_FLAG_UNCACHEABLE: usize = 1 << 4;
const ENTRY_FLAG_WRITE_COMBINING: usize = 1 << 7;
const ENTRY_FLAG_DEVICE_MEMORY: usize = PAT_UC_;
const ENTRY_FLAG_UNCACHEABLE: usize = PAT_UC_;
const ENTRY_FLAG_WRITE_COMBINING: usize = PAT_WC;
const PHYS_OFFSET: usize = Self::PAGE_NEGATIVE_MASK + (Self::PAGE_ADDRESS_SIZE >> 1) as usize; // PML4 slot 256 and onwards
rmm/src/arch/x86_shared.rs
+7
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@@ -1,3 +1,10 @@
// Page attribute table is indexed by PAT(7) PCD(4) PWT(3)
pub(crate) const _PAT_WB: usize = (0b0 << 7) + (0b00 << 3);
pub(crate) const _PAT_WT: usize = (0b0 << 7) + (0b01 << 3);
pub(crate) const PAT_UC_: usize = (0b0 << 7) + (0b10 << 3); // UC-
pub(crate) const _PAT_UC: usize = (0b0 << 7) + (0b11 << 3); // UC
pub(crate) const PAT_WC: usize = (0b1 << 7) + (0b00 << 3);
/// Setup page attribute table
#[cfg(any(target_arch = "x86", target_arch = "x86_64"))]
#[inline(always)]