Share the functions in interrupt/mod.rs between x86 and x86_64
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@@ -15,46 +15,3 @@ pub use super::{
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device::local_apic::bsp_apic_id,
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idt::{available_irqs_iter, is_reserved, set_reserved},
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};
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/// Clear interrupts
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#[inline(always)]
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pub unsafe fn disable() {
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core::arch::asm!("cli", options(nomem, nostack));
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}
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/// Set interrupts
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#[inline(always)]
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pub unsafe fn enable() {
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core::arch::asm!("sti", options(nomem, nostack));
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}
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/// Set interrupts and halt
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/// This will atomically wait for the next interrupt
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/// Performing enable followed by halt is not guaranteed to be atomic, use this instead!
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#[inline(always)]
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pub unsafe fn enable_and_halt() {
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core::arch::asm!("sti; hlt", options(nomem, nostack));
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}
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/// Set interrupts and nop
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/// This will enable interrupts and allow the IF flag to be processed
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/// Simply enabling interrupts does not gurantee that they will trigger, use this instead!
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#[inline(always)]
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pub unsafe fn enable_and_nop() {
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core::arch::asm!("sti; nop", options(nomem, nostack));
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}
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/// Halt instruction
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#[inline(always)]
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pub unsafe fn halt() {
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core::arch::asm!("hlt", options(nomem, nostack));
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}
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/// Pause instruction
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/// Safe because it is similar to a NOP, and has no memory effects
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#[inline(always)]
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pub fn pause() {
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unsafe {
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core::arch::asm!("pause", options(nomem, nostack));
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}
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}
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@@ -15,46 +15,3 @@ pub use super::{
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device::local_apic::bsp_apic_id,
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idt::{available_irqs_iter, is_reserved, set_reserved},
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};
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/// Clear interrupts
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#[inline(always)]
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pub unsafe fn disable() {
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core::arch::asm!("cli", options(nomem, nostack));
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}
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/// Set interrupts
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#[inline(always)]
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pub unsafe fn enable() {
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core::arch::asm!("sti", options(nomem, nostack));
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}
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/// Set interrupts and halt
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/// This will atomically wait for the next interrupt
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/// Performing enable followed by halt is not guaranteed to be atomic, use this instead!
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#[inline(always)]
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pub unsafe fn enable_and_halt() {
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core::arch::asm!("sti; hlt", options(nomem, nostack));
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}
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/// Set interrupts and nop
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/// This will enable interrupts and allow the IF flag to be processed
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/// Simply enabling interrupts does not gurantee that they will trigger, use this instead!
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#[inline(always)]
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pub unsafe fn enable_and_nop() {
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core::arch::asm!("sti; nop", options(nomem, nostack));
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}
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/// Halt instruction
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#[inline(always)]
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pub unsafe fn halt() {
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core::arch::asm!("hlt", options(nomem, nostack));
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}
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/// Pause instruction
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/// Safe because it is similar to a NOP, and has no memory effects
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#[inline(always)]
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pub fn pause() {
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unsafe {
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core::arch::asm!("pause", options(nomem, nostack));
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}
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}
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@@ -4,3 +4,46 @@ pub mod ipi;
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pub mod trace;
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pub use self::trace::stack_trace;
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/// Clear interrupts
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#[inline(always)]
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pub unsafe fn disable() {
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core::arch::asm!("cli", options(nomem, nostack));
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}
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/// Set interrupts
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#[inline(always)]
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pub unsafe fn enable() {
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core::arch::asm!("sti", options(nomem, nostack));
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}
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/// Set interrupts and halt
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/// This will atomically wait for the next interrupt
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/// Performing enable followed by halt is not guaranteed to be atomic, use this instead!
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#[inline(always)]
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pub unsafe fn enable_and_halt() {
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core::arch::asm!("sti; hlt", options(nomem, nostack));
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}
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/// Set interrupts and nop
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/// This will enable interrupts and allow the IF flag to be processed
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/// Simply enabling interrupts does not gurantee that they will trigger, use this instead!
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#[inline(always)]
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pub unsafe fn enable_and_nop() {
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core::arch::asm!("sti; nop", options(nomem, nostack));
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}
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/// Halt instruction
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#[inline(always)]
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pub unsafe fn halt() {
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core::arch::asm!("hlt", options(nomem, nostack));
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}
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/// Pause instruction
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/// Safe because it is similar to a NOP, and has no memory effects
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#[inline(always)]
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pub fn pause() {
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unsafe {
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core::arch::asm!("pause", options(nomem, nostack));
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}
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}
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