Unconditionally enable sys_stat
This commit is contained in:
@@ -50,7 +50,6 @@ default = [
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"multi_core",
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"serial_debug",
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"self_modifying",
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"sys_stat",
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"x86_kvm_pv",
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#"syscall_debug"
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]
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@@ -67,7 +66,6 @@ pti = []
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qemu_debug = []
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serial_debug = []
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system76_ec_debug = []
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sys_stat = []
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x86_kvm_pv = []
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debugger = ["syscall_debug"]
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+1
-27
@@ -1,9 +1,6 @@
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use alloc::{string::String, vec::Vec};
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use core::sync::atomic::{AtomicU8, AtomicUsize, Ordering};
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use alloc::string::String;
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#[cfg(feature = "sys_stat")]
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use alloc::vec::Vec;
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use crate::cpu_set::LogicalCpuId;
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// Note: Using AtomicUsize rather than AtomicU64 as 32bit x86 doesn't support the latter
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@@ -77,10 +74,6 @@ impl CpuStats {
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/// * `new_state` - The state of the CPU for the following ticks.
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#[inline]
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pub fn set_state(&self, new_state: CpuState) {
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if cfg!(not(feature = "sys_stat")) {
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return;
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}
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self.state.store(new_state as u8, Ordering::Relaxed);
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}
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@@ -92,10 +85,6 @@ impl CpuStats {
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/// * `ticks` - NUmber of ticks to add.
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#[inline]
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pub fn add_time(&self, ticks: usize) {
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if cfg!(not(feature = "sys_stat")) {
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return;
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}
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match self.state.load(Ordering::Relaxed) {
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val if val == CpuState::Idle as u8 => self.idle.fetch_add(ticks, Ordering::Relaxed),
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val if val == CpuState::User as u8 => self.user.fetch_add(ticks, Ordering::Relaxed),
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@@ -113,10 +102,6 @@ impl CpuStats {
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/// * `irq` - The ID of the interrupt that happened.
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#[inline]
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pub fn add_irq(&self, irq: u8) {
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if cfg!(not(feature = "sys_stat")) {
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return;
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}
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IRQ_COUNT[irq as usize].fetch_add(1, Ordering::Relaxed);
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self.irq.fetch_add(1, Ordering::Relaxed);
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}
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@@ -151,15 +136,10 @@ impl From<&CpuStats> for CpuStatsData {
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/// Add a context switch to the count.
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#[inline]
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pub fn add_context_switch() {
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if cfg!(not(feature = "sys_stat")) {
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return;
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}
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CONTEXT_SWITCH_COUNT.fetch_add(1, Ordering::Relaxed);
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}
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/// Get the number of context switches.
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#[cfg(feature = "sys_stat")]
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pub fn get_context_switch_count() -> usize {
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CONTEXT_SWITCH_COUNT.load(Ordering::Relaxed)
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}
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@@ -167,21 +147,15 @@ pub fn get_context_switch_count() -> usize {
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/// Add a context creation to the count.
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#[inline]
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pub fn add_context() {
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if cfg!(not(feature = "sys_stat")) {
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return;
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}
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CONTEXTS_COUNT.fetch_add(1, Ordering::Relaxed);
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}
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/// Get the number of contexts created.
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#[cfg(feature = "sys_stat")]
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pub fn get_contexts_count() -> usize {
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CONTEXTS_COUNT.load(Ordering::Relaxed)
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}
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/// Get the count of each interrupt.
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#[cfg(feature = "sys_stat")]
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pub fn irq_counts() -> Vec<usize> {
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IRQ_COUNT
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.iter()
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+5
-6
@@ -1,9 +1,12 @@
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use alloc::{
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sync::{Arc, Weak},
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vec::Vec,
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};
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use core::{
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cell::{Cell, RefCell},
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sync::atomic::{AtomicBool, AtomicPtr, Ordering},
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};
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use alloc::sync::{Arc, Weak};
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use rmm::Arch;
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use syscall::PtraceFlags;
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@@ -11,14 +14,11 @@ use crate::{
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arch::device::ArchPercpuMisc,
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context::{empty_cr3, memory::AddrSpaceWrapper, switch::ContextSwitchPercpu},
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cpu_set::{LogicalCpuId, MAX_CPU_COUNT},
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cpu_stats::CpuStats,
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cpu_stats::{CpuStats, CpuStatsData},
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ptrace::Session,
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syscall::debug::SyscallDebugInfo,
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};
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#[cfg(feature = "sys_stat")]
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use {crate::cpu_stats::CpuStatsData, alloc::vec::Vec};
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/// The percpu block, that stored all percpu variables.
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pub struct PercpuBlock {
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/// A unique immutable number that identifies the current CPU - used for scheduling
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@@ -55,7 +55,6 @@ pub unsafe fn init_tlb_shootdown(id: LogicalCpuId, block: *mut PercpuBlock) {
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ALL_PERCPU_BLOCKS[id.get() as usize].store(block, Ordering::Release)
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}
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#[cfg(feature = "sys_stat")]
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pub fn get_all_stats() -> Vec<(LogicalCpuId, CpuStatsData)> {
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let mut res = ALL_PERCPU_BLOCKS
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.iter()
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@@ -42,12 +42,10 @@ mod irq;
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mod log;
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mod scheme;
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mod scheme_num;
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mod stat;
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mod syscall;
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mod uname;
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#[cfg(feature = "sys_stat")]
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mod stat;
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enum Handle {
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TopLevel,
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Resource {
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@@ -85,7 +83,6 @@ const FILES: &[(&str, Kind)] = &[
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("env", Rd(|_| Ok(Vec::from(crate::init_env())))),
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#[cfg(any(target_arch = "x86", target_arch = "x86_64"))]
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("spurious_irq", Rd(interrupt::irq::spurious_irq_resource)),
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#[cfg(feature = "sys_stat")]
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("stat", Rd(stat::resource)),
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// Disabled because the debugger is inherently unsafe and probably will break the system.
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/*
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