aarch64 fp_load/fp_save do not need to be naked
There is a bug with LLVM and Rust causing naked functions to not support target_enable directives. https://github.com/rust-lang/rust/issues/136280
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@@ -204,9 +204,8 @@ pub unsafe fn empty_cr3() -> rmm::PhysicalAddress {
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}
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#[target_feature(enable = "neon")]
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#[naked]
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unsafe extern "C" fn fp_save(float_regs: &mut FloatRegisters) {
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core::arch::naked_asm!(
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core::arch::asm!(
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"stp q0, q1, [x0, {0} + 16 * 0]",
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"stp q2, q3, [x0, {0} + 16 * 2]",
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"stp q4, q5, [x0, {0} + 16 * 4]",
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@@ -228,7 +227,6 @@ unsafe extern "C" fn fp_save(float_regs: &mut FloatRegisters) {
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"str x9, [x0]",
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"mrs x9, fpsr",
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"str x9, [x0, {2} - {1}]",
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"ret",
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const mem::offset_of!(FloatRegisters, fp_simd_regs),
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const mem::offset_of!(FloatRegisters, fpcr),
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const mem::offset_of!(FloatRegisters, fpsr),
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@@ -236,9 +234,8 @@ unsafe extern "C" fn fp_save(float_regs: &mut FloatRegisters) {
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}
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#[target_feature(enable = "neon")]
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#[naked]
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unsafe extern "C" fn fp_load(float_regs: &mut FloatRegisters) {
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core::arch::naked_asm!(
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core::arch::asm!(
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"ldp q0, q1, [x0, {0} + 16 * 0]",
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"ldp q2, q3, [x0, {0} + 16 * 2]",
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"ldp q4, q5, [x0, {0} + 16 * 4]",
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@@ -260,7 +257,6 @@ unsafe extern "C" fn fp_load(float_regs: &mut FloatRegisters) {
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"msr fpcr, x9",
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"ldr x9, [x0, {2} - {1}]",
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"msr fpsr, x9",
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"ret",
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const mem::offset_of!(FloatRegisters, fp_simd_regs),
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const mem::offset_of!(FloatRegisters, fpcr),
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const mem::offset_of!(FloatRegisters, fpsr),
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