docs(policy): amdgpu/DCN315 display-slice C exemption (operator-approved 2026-08-04)

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2026-08-05 03:32:25 +03:00
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@@ -462,6 +462,27 @@ This exemption mirrors the operator-approved linux-kpi + redbear-iwlwifi exempti
struct layouts most reliably defined in C headers matching the Linux source, and the
transport follows the proven bounded-C-transport pattern.
### amdgpu + redbear DCN315 display-slice exemption (operator-approved 2026-08-04)
This block (a) regularizes the PRE-EXISTING amdgpu C surface
(`local/recipes/gpu/amdgpu/source/` — it predates the formal Rust-only policy; it is
recorded here, not expanded) and (b) authorizes the DCN315 minimal display slice C
boundary BY CATEGORY:
- **Authorized C ABI surface:** register access, DMUB interface, firmware load
(`dcn_3_1_5_dmcub.bin`). No modeset policy, no connector state, no scheme logic in C.
- **Reference-only Rust reimplementation:** DML math, resource-pool construction, HWSS
sequencing, modeset policy — ported into Rust using the Linux source as reference,
never compiled as C.
**Sequencing:** this category-level boundary landed first (todo 24 of the
ryzen-7000-x670e-compat program); the DCN315 closure record (derived from Linux 7.1
`dcn315_resource.c` before any port code is written) assigns every closure unit to
exactly one of the two classes above and is appended to this block as the concrete
surface list. No C may be added beyond the units the closure record classifies as C ABI.
Concrete surface list: **PENDING** — appended by the DCN315 closure record (todo 33).
## DURABILITY POLICY
Every change to an upstream-owned source tree (anything under `recipes/*/source/`) **must** be