Prevent infinite userspace crash loops.
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@@ -203,8 +203,8 @@ pub struct Context {
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pub struct SignalState {
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/// Offset to jump to when a signal is received.
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pub user_handler: NonZeroUsize,
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/// Offset to jump to when a program fault occurs.
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pub excp_handler: NonZeroUsize,
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/// Offset to jump to when a program fault occurs. If None, the context is sigkilled.
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pub excp_handler: Option<NonZeroUsize>,
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/// Signal control pages, shared memory
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pub thread_control: RaiiFrame,
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@@ -48,4 +48,17 @@ pub fn signal_handler() {
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.and_then(|_| ptrace::next_breakpoint().map(|f| f.contains(PTRACE_FLAG_IGNORE)));*/
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}
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pub fn excp_handler(signal: usize) {
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let Ok(current) = context::current() else {
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panic!("CPU exception but not inside of context! Trying to switch...");
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};
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let mut context = current.write();
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let Some(eh) = context.sig.as_ref().and_then(|s| s.excp_handler) else {
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context.being_sigkilled = true;
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context::switch();
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unreachable!();
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};
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// TODO
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}
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@@ -268,7 +268,6 @@ pub fn ksignal(signal: usize) {
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if let Some(context_lock) = contexts.current() {
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let mut context = context_lock.write();
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info!("NAME {}", context.name);
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//context.sig.pending |= 1 << (signal - 1);
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}
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}
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crate::context::signal::excp_handler(signal);
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+1
-1
@@ -1153,7 +1153,7 @@ impl<const FULL: bool> KernelScheme for ProcScheme<FULL> {
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threadctl_off: validate_off(data.thread_control_addr, mem::size_of::<Sigcontrol>())?,
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procctl_off: validate_off(data.proc_control_addr, mem::size_of::<SigProcControl>())?,
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user_handler: NonZeroUsize::new(data.user_handler).ok_or(Error::new(EINVAL))?,
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excp_handler: NonZeroUsize::new(data.excp_handler).ok_or(Error::new(EINVAL))?,
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excp_handler: NonZeroUsize::new(data.excp_handler),
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thread_control: addrsp
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.borrow_frame_enforce_rw_allocated(Page::containing_address(VirtualAddress::new(data.thread_control_addr)))?,
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proc_control: addrsp
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@@ -176,8 +176,8 @@ pub fn kill(pid: ContextId, sig: usize) -> Result<usize> {
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} else if sig == SIGKILL {
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context.being_sigkilled = true;
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} else if let Some((ctl, _, st)) = context.sigcontrol() {
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let was_new = ctl.word[sig_group].fetch_or(sig_bit(sig), Ordering::Relaxed);
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if (ctl.word[sig_group].load(Ordering::Relaxed) >> 32) & sig_bit(sig) != 0 {
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let _was_new = ctl.word[sig_group].fetch_or(sig_bit(sig), Ordering::Relaxed);
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if (ctl.word[sig_group].load(Ordering::Relaxed) >> 32) & sig_bit(sig) == 0 {
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st.is_pending = true;
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}
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} else {
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