Fix thread spawning on aarch64

* Correctly align the stack
* Fix argument order of the ldp instructions
* Remove unnecessary ldr x5 instruction
This commit is contained in:
bjorn3
2024-03-17 17:09:41 +01:00
parent dc9f3e207f
commit 7ac379a7a1
2 changed files with 10 additions and 4 deletions
+3 -4
View File
@@ -97,10 +97,9 @@ core::arch::global_asm!(
.p2align 6
__relibc_internal_rlct_clone_ret:
# Load registers
ldp x0, x8, [sp], #16
ldp x2, x1, [sp], #16
ldp x4, x3, [sp], #16
ldr x5, [sp], #16
ldp x8, x0, [sp], #16
ldp x1, x2, [sp], #16
ldp x3, x4, [sp], #16
# Call entry point
blr x8
+7
View File
@@ -174,6 +174,13 @@ pub(crate) unsafe fn create(
stack.write(value);
};
if cfg!(target_arch = "aarch64") {
// Aarch64 requires the stack to be 16 byte aligned after
// the call instruction, unlike x86 which requires it to be
// aligned before the call instruction. As such push an
// extra word on the stack to align the stack to 16 bytes.
push(0);
}
push(0);
push(synchronization_mutex as usize);
push(ptr as usize);