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intel: fix PREEMPTION_VERTEX_COUNT mask, remove fabricated Wa_16012751909

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Admin Pupkin
2026-06-03 09:54:21 +03:00
parent 210d8a9a80
commit 775e6dc464
2 changed files with 1 additions and 2 deletions
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local/recipes/gpu/redox-drm/source/src/drivers/intel/regs_gt.rs
+1 -1
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@@ -399,7 +399,7 @@ pub const FF_MODE2_GS_TIMER_224: u32 = 224 << 24;
pub const DG1_FLOAT_POINT_BLEND_OPT_STRICT_MODE_EN: u32 = 1 << 12;
pub const DG1_HZ_READ_SUPPRESSION_OPTIMIZATION_DISABLE: u32 = 1 << 14;
pub const MSC_MSAA_REODER_BUF_BYPASS_DISABLE: u32 = 1 << 14;
pub const PREEMPTION_VERTEX_COUNT: u32 = 0x4000;
pub const PREEMPTION_VERTEX_COUNT: u32 = 0xFFFF;
pub const SCOREBOARD_STALL_FLUSH_CONTROL: u32 = 1 << 5;
pub const FD_END_COLLECT: u32 = 1 << 5;
pub const MSAA_OPTIMIZATION_REDUC_DISABLE: u32 = 1 << 11;
local/recipes/gpu/redox-drm/source/src/drivers/intel/workarounds.rs
-1
View File
@@ -375,7 +375,6 @@ fn gen12_gt_workarounds_init(wal: &mut WorkaroundList, stepping: u8) {
wa_write_or(wal, GEN11_GT_SCRATCH, 1 << 9, "Wa_14012688713");
wa_masked_en(wal, GEN8_ROW_CHICKEN, GEN9_ENABLE_ROW_CHICKEN, "Wa_16013039831");
wa_write_or(wal, GEN8_SAMPLER_MODE, 1 << 8, "Wa_14013676891");
wa_write_or(wal, GEN12_COMMON_SLICE_CHICKEN2, GEN12_CSC2_SCOREBOARD_STALL_FLUSH_CONTROL, "Wa_16012751909");
wa_write_or(wal, GEN7_HALF_SLICE_CHICKEN1, GEN8_HSH_CHICKEN3_DOP_GATING_DISABLE, "Wa_16012322899");
wa_mcr_write_or(wal, GEN10_DFR_RATIO_EN_AND_CHICKEN, DFR_DISABLE, "Wa_14011059788");
wa_add(wal, GEN7_MISCCPCTL, GEN12_DOP_CLOCK_GATE_RENDER_ENABLE, 0, 0, "Wa_14015795083");