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docs: MASTER plan — desktop path ready for runtime validation

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Updated desktop/GPU section: all code fixes complete for both
VirGL and Intel GPU drivers. Qt6 Wayland crash fixed, SDDM wired,
KWin builds, Mesa virgl builds.

Next phase: runtime validation on QEMU virtio-vga-gl and real
Intel hardware.
This commit is contained in:
vasilito
2026-07-09 13:30:12 +03:00
parent 7683a409fc
commit 68ad2db779
1 changed files with 12 additions and 5 deletions
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local/docs/IMPLEMENTATION-MASTER-PLAN.md
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@@ -34,14 +34,21 @@ Subsystem plans resolved/no longer active:
| `RAPL-IMPLEMENTATION-PLAN.md` | P0 resolved (MSR scheme), Phase 1 reader done |
| `ACPI-IMPROVEMENT-PLAN.md` | Updated (FADT fix, LegacyBackend basic) |
### Desktop/GPU Progress (2026-07-08)
### Desktop/GPU Progress (2026-07-08) — READY FOR RUNTIME VALIDATION
| Driver | Status | Detail |
|--------|--------|--------|
| **virtio-gpu VirGL** | 3D feature negotiation enabled | `virtio_gpu_dri.so` builds (17.4MB), CommandTy has 10 3D commands |
| **ihdgd Kaby Lake** | DDI port registers populated | Gen9 DDI_BUF_CTL registers (0x64000-0x64300) for display output |
| **ihdgd Tiger Lake** | Port registers already set | Gen12 registers (0x162000, 0x6C000, 0x160000) |
| **Mesa virgl** | Builds | EGL runtime probe is remaining gap |
| **virtio-gpu VirGL** | 3D feature negotiation enabled | `virtio_gpu_dri.so` builds (17.4MB), 10 3D commands |
| **ihdgd Kaby Lake** | DDI ports + GMBUS write | Gen9 DDI_BUF_CTL (0x64000-0x64300), I2C write |
| **ihdgd Tiger Lake** | Already complete | Gen12 registers (0x162000, 0x6C000, 0x160000) |
| **Mesa virgl** | 6 patches wired | EGL runtime probe via `MESA_LOADER_DRIVER_OVERRIDE=virgl` |
| **Qt6 Wayland** | null+8 crash fixed | Patches de2d74c37e, 882c2974ec |
| **SDDM** | Wired (build) | v0.21.0 + pam-redbear in redbear-full.toml |
| **KWin** | Builds | In redbear-full.toml |
| **redbear-sessiond** | 246 lines | D-Bus session broker for KWin |
| **redox-drm** | virtio + Intel backends | 136-line virtio, Intel GGTT/ring scaffolding |
**Next phase: Runtime validation** — QEMU with `-device virtio-vga-gl` for VirGL 3D desktop, real Intel hardware for ihdgd.
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