docs(plan): add Ryzen 7000 / X670E host compatibility plan

This commit is contained in:
2026-08-05 14:52:51 +03:00
parent 85c84eb6c5
commit 62e91e7d96
2 changed files with 85 additions and 16 deletions
@@ -82,3 +82,39 @@ $ wc -l file
4. **Evidence language**: every runtime statement is framed as planned/expected with
an explicit "nothing is claimed today" framing; no bare-metal or QEMU result is
asserted as done.
## Addendum 2026-08-05 (refinement pass, delegated writer session)
Reviewed the committed doc against the task's MUST-DO list and applied targeted
refinements (no structural rewrite — the doc was already complete and committed as
`c06e51c496` + `56a414422c`):
1. §1 host profile: added CPU family/model (`family 0x19 model 0x61`).
2. CORRECTION 1: added the explicit **11-blob Raphael firmware set** enumeration and
the **NO `smu_13_0_5.bin`** phantom note (APU SMU loads via PSP).
3. §2 matrix: verdicts aligned to the assessed spec — CPU/SMP, AHCI, xHCI, NVMe
class-match now ✅; added missing rows for **dual IO-APIC** (🟡 structural,
unvalidated), **MADT types 0x4/0x5/0x9/0xA** (❌/GAP), **VESA/GOP console** (✅),
**NVMe HMB** (❌/GAP), **UAS dispatch** (❌/GAP), **PCI resource allocation**
(❌/GAP, critical). HMB/UAS content moved out of the NVMe class-match rows into
their own rows so the class verdict and the feature gap are not conflated.
4. §3 boot-path: added §3.3 (S5 unbounded spin) and §3.4 (no bare-metal TSC
calibration) callouts to match the required hazard list.
5. §4: added the S/M/L/XL effort scale and per-phase effort labels incl. the Gate A
(end of Phase 5) / Gate B (end of Phase 8) markings.
### Verification outputs (this session, repo root, branch 0.3.2)
```
$ test -s local/docs/RYZEN-7000-X670E-COMPATIBILITY-PLAN.md && grep -c '^### PHASE' local/docs/RYZEN-7000-X670E-COMPATIBILITY-PLAN.md
9 (>= 7 required: PASS)
$ grep -q 'DCN 3.1.5' f && grep -q 'redbear-r8125d' f && grep -q 'redbear-mt7922' f
all true: PASS
$ grep -E '10ec:8125|14c3:0616|1002:164e|1022:15e3|1022:790b' f | wc -l
17 (>= 5 required: PASS)
$ grep -q 'BE201\|8086:7740' f ; echo $?
1 (no Intel-only leftovers: PASS)
```
@@ -25,6 +25,11 @@ first-class bare-metal target.
> DML, not a DCN 3.1.4 port. Firmware is `dcn_3_1_5_dmcub.bin`, `gc_10_3_6_*`,
> `sdma_5_2_6.bin`, `vcn_3_1_2.bin`, `psp_13_0_5_*` — NOT the RDNA3 set
> (`sdma_6_*`, `vcn_4_*`, `mes_2_*`).
> **The Raphael firmware set is exactly 11 blobs:**
> `gc_10_3_6_{ce,pfp,me,mec,mec2,rlc}.bin` (6), `psp_13_0_5_{toc,ta}.bin` (2),
> `sdma_5_2_6.bin` (1), `vcn_3_1_2.bin` (1), `dcn_3_1_5_dmcub.bin` (1).
> **There is NO `smu_13_0_5.bin`** — that name is a phantom; on the APU the SMU
> firmware loads via the PSP, not as a standalone blob.
> ### ⚠️ CORRECTION 2 — RTL8125 2.5GbE needs a NEW driver (`redbear-r8125d`); `rtl8168d` CANNOT bind it
> The onboard wired NIC is a Realtek RTL8125 [10ec:8125]. The existing `rtl8168d`
@@ -54,7 +59,7 @@ first-class bare-metal target.
|---|---|
| Model | MSI MPG X670E CARBON WIFI (MS-7D70); DMI: `Micro-Star International Co., Ltd. MS-7D70/MPG X670E CARBON WIFI (MS-7D70)` |
| BIOS | AMI BIOS 1.74, UEFI |
| CPU | AMD Ryzen 9 7900X (Raphael, Zen 4), 12 cores / 24 threads, x2APIC, invariant TSC, CPPC |
| CPU | AMD Ryzen 9 7900X (Raphael, Zen 4), family 0x19 model 0x61, 12 cores / 24 threads, x2APIC, invariant TSC, CPPC |
| Chipset | AMD X670E — dual Promontory (PROM21) chipset (two downstream PROM21 complexes) |
| RAM | 64 GB |
| Display GPU (target) | AMD Raphael integrated GPU [1002:164e] — DCN 3.1.5, GC 10.3.6, SDMA 5.2.6, VCN 3.1.2, MP0/MP1 13.0.5. **Currently BIOS-disabled** (dGPU present, iGPU not enumerated in the captured dmesg); BIOS enablement + GOP/display capture is a hard prerequisite for all display work |
@@ -83,12 +88,15 @@ Evidence levels are compile/static only unless a QEMU harness is named. **No row
| Device | ID | Red Bear component | Verdict | Evidence |
|---|---|---|---|---|
| UEFI boot | — | bootloader fork | ✅ | AMI UEFI is standard; Red Bear UEFI boot proven on AMD bare metal (Threadripper) |
| CPU/SMP | Zen 4 | kernel x2APIC path | 🟡 | x2APIC works via CPUID (`local_apic.rs:52-79`); MADT types 0x4/0x5/0x9/0xA are NOT parsed in the kernel fork (`madt/mod.rs:149-228` falls to Unknown); normalization planned (Wave 1) |
| CPU/SMP | Zen 4 | kernel x2APIC path | | x2APIC works via CPUID (`local_apic.rs:52-79`); 128-thread AMD bare metal previously verified. (MADT record-type gap tracked separately below — it does not change the class verdict) |
| MADT types 0x4/0x5/0x9/0xA | — | kernel MADT parser | ❌/GAP | NOT parsed in the checked kernel fork (`madt/mod.rs:149-228` falls to Unknown); `IrqScheme::init()` consumes type-0 records only (`irq.rs:109`); normalization + dedup + per-CPU NMI planned (Wave 1) |
| Dual IO-APIC (X670E) | MADT type 1 ×2 | kernel `ioapic.rs` | 🟡 | Structurally supported (`ioapic.rs:215-248,450-459`); **unvalidated** — no dual-IO-APIC bare-metal run has happened |
| VESA/GOP console | — | `vesad`+`fbcond` | ✅ | Boot framebuffer path, always present; requires the iGPU BIOS-enabled for a GOP framebuffer on this host |
| Raphael root complex / data fabric | 1022:14d8, 1022:14d9 | pcid (bus-layer) | ✅ (n/a) | Host-bridge/data-fabric functions; no userspace driver needed by design |
| Chipset PCIe switch | 1022:43f4 | pcid (bus-layer) | ✅ (n/a) | Bridge recursion exists (`pcid main.rs:324-344`); multi-host-bridge FIXME noted |
| Chipset AHCI (ASM1064 re-brand) | 1022:43f6 | `ahcid` | 🟡 | Class match suffices (upstream ASM1064 = 1b21:1064 board_ahci generic); ahcid is legacy-IRQ only with re-arm fix — fine for ASM1064; no HW validation |
| Chipset xHCI | 1022:43f7 | `xhcid` | 🟡 | Class match; Linux flag `XHCI_DEFAULT_PM_RUNTIME_ALLOW` (`xhci-pci.c:331`); 51-flag quirk table exists in redox-driver-sys; no HW validation |
| Raphael USB4-adjacent xHCI ×3 | 1022:15b6, 1022:15b7, 1022:15b8 | `xhcid` | 🟡 | Class match; hci version 0x120 → `DEFAULT_PM_RUNTIME_ALLOW` rule already exists; no HW validation |
| Chipset AHCI (ASM1064 re-brand) | 1022:43f6 | `ahcid` | | Class match suffices (upstream ASM1064 = 1b21:1064 board_ahci generic); ahcid is legacy-IRQ only with re-arm fix — fine for ASM1064 |
| Chipset xHCI | 1022:43f7 | `xhcid` | ✅→🟡 | Class match; Linux flag `XHCI_DEFAULT_PM_RUNTIME_ALLOW` (`xhci-pci.c:331`); 51-flag quirk table exists in redox-driver-sys; quirk parity planned (Wave 4), no HW validation |
| Raphael USB4-adjacent xHCI ×3 | 1022:15b6, 1022:15b7, 1022:15b8 | `xhcid` | ✅→🟡 | Class match; hci version 0x120 → `DEFAULT_PM_RUNTIME_ALLOW` rule already exists; no HW validation |
| Ryzen HD Audio | 1022:15e3 | `ihdad` | 🟡 | ihdad code claims ANY class 0x0403 (spec-compliant verbs/CORB/RIRB), but driver-manager TOML is vendor=0x8086-only (`50-audio.toml:9-11`) — widen match + runtime-verify |
| AMD PSP (crypto) | 1022:1649 | — | ❌ (deferred) | No driver, no consumer — documented deferral, see §7 table |
| FCH SMBus | 1022:790b, 1022:790e | `redbear-smbusd` (new) | ❌→planned | No driver today; Linux `i2c-piix4` binds 1022:790b (rev ≥ 0x51, MMIO mode); `amd-mp2-i2cd` is a DIFFERENT IP — new daemon or extension required |
@@ -98,8 +106,11 @@ Evidence levels are compile/static only unless a QEMU harness is named. **No row
| RTL8125 2.5GbE | 10ec:8125 | **`redbear-r8125d` (new)** | ❌→planned | **rtl8168d CANNOT bind it** (CORRECTION 2); port Linux `r8169` 8125 sections; fw `rtl_nic/rtl8125*-*.fw` via firmware-loader; match entry with subclass filter per the 10-network.toml precedent |
| MT7922 Wi-Fi | 14c3:0616 | **`redbear-mt7922` (new)** | ❌→planned | mt7921 family, SoftMAC (CORRECTION 3); bounded mt76 C transport (linux-kpi exemption) + Rust SoftMAC/MLME control plane + redbear-wifictl backend; ~6.6k LoC Linux reference |
| MediaTek BT | 0e8d:0616 | `redbear-btusb` btmtk module | 🟡→planned | HCI core in redbear-btusb is vendor-agnostic (`hci.rs` ~1848 LoC) but vendor list lacks 0x0E8D and `btintel.rs` is Intel-specific; needs btmtk (WMT) module + real USB HCI transport (control/interrupt/bulk, STALL recovery) |
| ADATA NVMe (DRAM-less) | 1cc1:5766 | `nvmed` + HMB | 🟡 | Class match works; no Linux quirks (generic); nvmed declares cmbloc/cmbsz but never uses them — **HMB (FID 0x0D) is new work**, with HMMIN floor and clean disable if `min(HMPRE,cap) < HMMIN` |
| Samsung NVMe | 144d:a80c | `nvmed` | 🟡 | Class match; generic (no quirks); PRP-only, 8-queue cap, single MSI — adequate; no HW validation |
| ADATA NVMe (DRAM-less) | 1cc1:5766 | `nvmed` | | Class match works, initfs-capable; no Linux quirks (generic). (HMB support gap tracked separately below) |
| Samsung NVMe | 144d:a80c | `nvmed` | | Class match; generic (no quirks); PRP-only, 8-queue cap, single MSI — adequate |
| NVMe Host Memory Buffer | 1cc1:5766 | `nvmed` | ❌/GAP | No HMB (FID 0x0D) support; `cmbloc/cmbsz` are the unrelated Controller Memory Buffer and stay unused; HMB with HMMIN floor planned (Wave 4), gated on `nvme id-ctrl` HMPRE>0 |
| UAS USB storage dispatch | ADATA SC750 | `usbscsid` | ❌/GAP | 1006-line `uas.rs` exists but dispatch matches protocol 0x50 (BOT) only — UAS (0x62) devices are silently unspawned (`main.rs:57-62`); wiring + alt-setting BOT fallback planned (Wave 4) |
| PCI resource allocation | — | pcid | ❌/GAP (critical) | **No BAR assignment or bridge-window allocator exists anywhere** (`pcid/cfg_access/mod.rs:423-447` passthrough; `main.rs:33-71` firmware BARs only). This firmware leaves real conflicts (AMDIF031 @ 0xfb300000 — Linux reassigns; Red Bear cannot today). Fail-closed auditor + transactional allocator planned (Wave 3) |
| Raphael iGPU (display target) | 1002:164e | `redox-drm` / amdgpu DCN315 slice | ❌→planned | DCN 3.1.5 (CORRECTION 1); **currently BIOS-disabled** — enablement is prerequisite; existing bounded AMD glue has the WRONG BAR model for the APU (BAR0=framebuffer aperture / BAR2=doorbells / BAR5=MMIO; current glue inverts roles) and reads the first MMIO dword as a device ID — **do NOT ship it on Raphael**; path is GOP/vesad interim → read-only probe → DCN315 slice |
| NVIDIA RTX 4080 | 10de:2704 | — | ❌ (excluded) | **Explicitly excluded by the operator** — no work of any kind, see §7 |
| MSI Mystic Light | 1462:7d70 | — (tolerate) | 🟡 (enumerate-only) | Vendor RGB HID; must enumerate without errors via usbhidd; no vendor-protocol driver (no consumer) |
@@ -194,6 +205,26 @@ subtree only if needed; snapshot → disable → size → program → verify →
failure leave the subtree disabled). No hot-plug initially; `NO_RESOURCE_RELOC`
means "preserve and fail closed."
### 3.3 The S5 unbounded-spin callout
acpid's `set_global_s_state(5)` writes the PM1 register and then **spins forever**
(`acpid/acpi.rs:1226-1230`) — if the machine does not transition, it sits dead with
no diagnostic. The fix (Phase 1.3): a bounded 5 s wait, then a named terminal
fallback chain — FADT `reset_reg`/`reset_value` reboot (already parsed at
`acpi.rs:1890-1892`), then the 8042 keyboard-controller pulse, and only if every
mechanism fails a halt with a distinct error state. Never an unbounded silent spin.
### 3.4 The bare-metal TSC calibration callout
The kernel TSC path today is **KVM pvclock only** (`device/tsc.rs:58-95`) — on bare
metal there is no TSC frequency calibration at all, and the HPET/PIT fallback carries
a rollover TODO (`time.rs:19`). The fix (Phase 1.2) is entirely kernel-local:
CPUID 0x15 crystal-clock ratio (validated against a short HPET window) → HPET-measured
calibration → FADT PM-timer-measured calibration, gated on invariant TSC
(CPUID 0x80000007:EDX[8]), with forced-source test modes that fail loudly when the
selected source is unavailable. Gate A asserts the calibration source actually used
and the measured drift.
---
## 4. Multiphase Plan
@@ -207,9 +238,11 @@ CONFIG_NAME=redbear-mini` (Gate A path) and `=redbear-full` (Gate B path) run an
are archived at every image gate. Evidence language stays honest throughout:
compile-visible ≠ QEMU-bounded ≠ hardware-validated.
Effort scale: S (<1 week) · M (13 weeks) · L (38 weeks) · XL (8+ weeks)
---
### PHASE 0 — Durable documentation, DMI quirk profile, host evidence capture (Wave 0, todos 14)
### PHASE 0 — Durable documentation, DMI quirk profile, host evidence capture (Wave 0, todos 14) — effort S
| # | Work item | Notes |
|---|---|---|
@@ -222,7 +255,7 @@ compile-visible ≠ QEMU-bounded ≠ hardware-validated.
---
### PHASE 1 — Boot substrate (Wave 1, todos 58, 41)
### PHASE 1 — Boot substrate (Wave 1, todos 58, 41) — effort M
| # | Work item | Notes |
|---|---|---|
@@ -237,7 +270,7 @@ poweroff/reboot terminate cleanly; no-i8042 boot reaches login on USB HID.
---
### PHASE 2 — ACPI/acpid hardening, continuing the ACPICA-to-Rust port (Wave 2, todos 914)
### PHASE 2 — ACPI/acpid hardening, continuing the ACPICA-to-Rust port (Wave 2, todos 914) — effort ML
Per the LG plan §2.3 verdict: port ACPICA's algorithms and data structures into the
vendored acpi-rs fork + acpid, never the C library.
@@ -256,7 +289,7 @@ QEMU AMD-Vi self-test shows per-device IRTE + delivered-through-remap interrupt.
---
### PHASE 3 — PCI resource safety (Wave 3, todos 1517)
### PHASE 3 — PCI resource safety (Wave 3, todos 1517) — effort ML (highest-risk item)
| # | Work item | Notes |
|---|---|---|
@@ -269,7 +302,7 @@ conflict shape from the task-3 evidence is repaired in simulation.
---
### PHASE 4 — Storage + USB (Wave 4, todos 1820)
### PHASE 4 — Storage + USB (Wave 4, todos 1820) — effort SM
| # | Work item | Notes |
|---|---|---|
@@ -281,7 +314,7 @@ conflict shape from the task-3 evidence is repaired in simulation.
---
### PHASE 5 — Wired network: `redbear-r8125d` (Wave 5, todos 2124 + Gate A at todo 23)
### PHASE 5 — Wired network: `redbear-r8125d` (Wave 5, todos 2124 + Gate A at todo 23) — effort M, ends at **Gate A (minimally usable)**
| # | Work item | Notes |
|---|---|---|
@@ -294,7 +327,7 @@ conflict shape from the task-3 evidence is repaired in simulation.
---
### PHASE 6 — Wi-Fi: `redbear-mt7922` (Wave 6, todos 2528)
### PHASE 6 — Wi-Fi: `redbear-mt7922` (Wave 6, todos 2528) — effort LXL (longest single port)
| # | Work item | Notes |
|---|---|---|
@@ -307,7 +340,7 @@ conflict shape from the task-3 evidence is repaired in simulation.
---
### PHASE 7 — Bluetooth + Raphael display (Wave 7, todos 2934)
### PHASE 7 — Bluetooth + Raphael display (Wave 7, todos 2934) — effort LXL (DCN315 slice)
| # | Work item | Notes |
|---|---|---|
@@ -323,7 +356,7 @@ operational; coexistence proven.
---
### PHASE 8 — Platform drivers + deferred-docs + Gate B (Waves 89, todos 3540)
### PHASE 8 — Platform drivers + deferred-docs + Gate B (Waves 89, todos 3540) — effort SM per item, ends at **Gate B (full)**
| # | Work item | Notes |
|---|---|---|