Clean up aml::Handler
This commit is contained in:
+74
-198
@@ -147,7 +147,6 @@ impl AmlPhysMemHandler {
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}
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}
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#[cfg(any(target_arch = "x86", target_arch = "x86_64"))]
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impl aml::Handler for AmlPhysMemHandler {
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fn read_u8(&self, address: usize) -> u8 {
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log::trace!("read u8 {:X}", address);
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@@ -156,6 +155,7 @@ impl aml::Handler for AmlPhysMemHandler {
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return value;
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}
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}
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log::error!("failed to read u8 {:#x}", address);
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0
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}
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fn read_u16(&self, address: usize) -> u16 {
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@@ -165,6 +165,7 @@ impl aml::Handler for AmlPhysMemHandler {
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return value;
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}
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}
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log::error!("failed to read u16 {:#x}", address);
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0
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}
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fn read_u32(&self, address: usize) -> u32 {
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@@ -174,6 +175,7 @@ impl aml::Handler for AmlPhysMemHandler {
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return value;
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}
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}
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log::error!("failed to read u32 {:#x}", address);
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0
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}
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fn read_u64(&self, address: usize) -> u64 {
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@@ -183,40 +185,45 @@ impl aml::Handler for AmlPhysMemHandler {
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return value;
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}
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}
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log::error!("failed to read u64 {:#x}", address);
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0
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}
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fn write_u8(&mut self, address: usize, value: u8) {
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log::error!("write u8 {:X} = {:X}", address, value);
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log::trace!("write u8 {:X} = {:X}", address, value);
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if let Ok(mut page_cache) = self.page_cache.lock() {
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if page_cache.write_to_phys::<u8>(address, value).is_err() {
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log::error!("failed to get page {:#x}", address);
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if page_cache.write_to_phys::<u8>(address, value).is_ok() {
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return;
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}
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}
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log::error!("failed to write u8 {:#x}", address);
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}
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fn write_u16(&mut self, address: usize, value: u16) {
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log::error!("write u16 {:X} = {:X}", address, value);
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log::trace!("write u16 {:X} = {:X}", address, value);
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if let Ok(mut page_cache) = self.page_cache.lock() {
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if page_cache.write_to_phys::<u16>(address, value).is_err() {
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log::error!("failed to get page {:#x}", address);
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if page_cache.write_to_phys::<u16>(address, value).is_ok() {
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return;
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}
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}
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log::error!("failed to write u16 {:#x}", address);
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}
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fn write_u32(&mut self, address: usize, value: u32) {
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log::error!("write u32 {:X} = {:X}", address, value);
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log::trace!("write u32 {:X} = {:X}", address, value);
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if let Ok(mut page_cache) = self.page_cache.lock() {
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if page_cache.write_to_phys::<u32>(address, value).is_err() {
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log::error!("failed to get page {:#x}", address);
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if page_cache.write_to_phys::<u32>(address, value).is_ok() {
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return;
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}
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}
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log::error!("failed to write u32 {:#x}", address);
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}
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fn write_u64(&mut self, address: usize, value: u64) {
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log::error!("write u64 {:X} = {:X}", address, value);
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log::trace!("write u64 {:X} = {:X}", address, value);
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if let Ok(mut page_cache) = self.page_cache.lock() {
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if page_cache.write_to_phys::<u64>(address, value).is_err() {
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log::error!("failed to get page {:#x}", address);
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if page_cache.write_to_phys::<u64>(address, value).is_ok() {
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return;
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}
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}
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log::error!("failed to write u64 {:#x}", address);
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}
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// Pio must be enabled via syscall::iopl
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@@ -246,230 +253,99 @@ impl aml::Handler for AmlPhysMemHandler {
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Pio::<u32>::new(port).write(value)
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}
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fn read_pci_u8(&self, _segment: u16, _bus: u8, _device: u8, _function: u8, _offset: u16) -> u8 {
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log::error!(
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"read pci u8 {:X}, {:X}, {:X}, {:X}, {:X}",
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_segment,
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_bus,
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_device,
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_function,
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_offset
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);
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0
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}
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fn read_pci_u16(
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&self,
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_segment: u16,
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_bus: u8,
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_device: u8,
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_function: u8,
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_offset: u16,
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) -> u16 {
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log::error!(
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"read pci u16 {:X}, {:X}, {:X}, {:X}, {:X}",
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_segment,
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_bus,
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_device,
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_function,
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_offset
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);
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0
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}
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fn read_pci_u32(
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&self,
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_segment: u16,
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_bus: u8,
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_device: u8,
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_function: u8,
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_offset: u16,
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) -> u32 {
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log::error!(
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"read pci u32 {:X}, {:X}, {:X}, {:X}, {:X}",
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_segment,
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_bus,
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_device,
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_function,
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_offset
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);
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0
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}
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fn write_pci_u8(
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&self,
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_segment: u16,
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_bus: u8,
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_device: u8,
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_function: u8,
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_offset: u16,
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_value: u8,
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) {
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log::error!(
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"write pci u8 {:X}, {:X}, {:X}, {:X}, {:X} = {:X}",
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_segment,
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_bus,
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_device,
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_function,
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_offset,
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_value
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);
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}
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fn write_pci_u16(
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&self,
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_segment: u16,
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_bus: u8,
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_device: u8,
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_function: u8,
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_offset: u16,
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_value: u16,
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) {
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log::error!(
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"write pci u16 {:X}, {:X}, {:X}, {:X}, {:X} = {:X}",
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_segment,
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_bus,
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_device,
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_function,
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_offset,
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_value
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);
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}
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fn write_pci_u32(
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&self,
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_segment: u16,
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_bus: u8,
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_device: u8,
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_function: u8,
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_offset: u16,
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_value: u32,
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) {
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log::error!(
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"write pci u32 {:X}, {:X}, {:X}, {:X}, {:X} = {:X}",
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_segment,
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_bus,
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_device,
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_function,
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_offset,
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_value
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);
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}
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}
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#[cfg(not(any(target_arch = "x86", target_arch = "x86_64")))]
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impl aml::Handler for AmlPhysMemHandler {
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fn read_u8(&self, _address: usize) -> u8 {
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log::error!("read u8 {:X}", _address);
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0
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}
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fn read_u16(&self, _address: usize) -> u16 {
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log::error!("read u16 {:X}", _address);
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0
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}
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fn read_u32(&self, _address: usize) -> u32 {
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log::error!("read u32 {:X}", _address);
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0
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}
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fn read_u64(&self, _address: usize) -> u64 {
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log::error!("read u64 {:X}", _address);
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0
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}
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fn write_u8(&mut self, _address: usize, _value: u8) {
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log::error!("write u8 {:X} = {:X}", _address, _value);
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}
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fn write_u16(&mut self, _address: usize, _value: u16) {
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log::error!("write u16 {:X} = {:X}", _address, _value);
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}
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fn write_u32(&mut self, _address: usize, _value: u32) {
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log::error!("write u32 {:X} = {:X}", _address, _value);
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}
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fn write_u64(&mut self, _address: usize, _value: u64) {
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log::error!("write u64 {:X} = {:X}", _address, _value);
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}
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#[cfg(not(any(target_arch = "x86", target_arch = "x86_64")))]
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fn read_io_u8(&self, port: u16) -> u8 {
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log::error!("read io u8 {:X}", port);
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log::error!("cannot read u8 from port 0x{port:04X}");
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0
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}
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#[cfg(not(any(target_arch = "x86", target_arch = "x86_64")))]
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fn read_io_u16(&self, port: u16) -> u16 {
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log::error!("read io u16 {:X}", port);
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log::error!("cannot read u16 from port 0x{port:04X}");
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0
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}
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#[cfg(not(any(target_arch = "x86", target_arch = "x86_64")))]
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fn read_io_u32(&self, port: u16) -> u32 {
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log::error!("read io u32 {:X}", port);
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log::error!("cannot read u32 from port 0x{port:04X}");
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0
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}
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#[cfg(not(any(target_arch = "x86", target_arch = "x86_64")))]
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fn write_io_u8(&self, port: u16, value: u8) {
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log::error!("write io u8 {:X} = {:X}", port, value);
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log::error!("cannot write 0x{value:02X} to port 0x{port:04X}");
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}
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#[cfg(not(any(target_arch = "x86", target_arch = "x86_64")))]
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fn write_io_u16(&self, port: u16, value: u16) {
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log::error!("write io u16 {:X} = {:X}", port, value);
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log::error!("cannot write 0x{value:04X} to port 0x{port:04X}");
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}
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#[cfg(not(any(target_arch = "x86", target_arch = "x86_64")))]
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fn write_io_u32(&self, port: u16, value: u32) {
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log::error!("write io u32 {:X} = {:X}", port, value);
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log::error!("cannot write 0x{value:08X} to port 0x{port:04X}");
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}
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fn read_pci_u8(&self, _segment: u16, _bus: u8, _device: u8, _function: u8, _offset: u16) -> u8 {
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log::error!("read pci u8 {:X}", _device);
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fn read_pci_u8(
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&self,
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seg: u16,
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bus: u8,
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dev: u8,
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func: u8,
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off: u16,
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) -> u8 {
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log::error!("read pci u8 {seg:04X}:{bus:02X}:{dev:02X}.{func:01X}@{off:04X}");
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0
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}
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fn read_pci_u16(
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&self,
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_segment: u16,
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_bus: u8,
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_device: u8,
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_function: u8,
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_offset: u16,
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seg: u16,
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bus: u8,
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dev: u8,
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func: u8,
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off: u16,
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) -> u16 {
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log::error!("read pci u8 {:X}", _device);
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log::error!("read pci u16 {seg:04X}:{bus:02X}:{dev:02X}.{func:01X}@{off:04X}");
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0
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}
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fn read_pci_u32(
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&self,
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_segment: u16,
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_bus: u8,
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_device: u8,
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_function: u8,
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_offset: u16,
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seg: u16,
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bus: u8,
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dev: u8,
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func: u8,
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off: u16,
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) -> u32 {
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log::error!("read pci u8 {:X}", _device);
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log::error!("read pci u32 {seg:04X}:{bus:02X}:{dev:02X}.{func:01X}@{off:04X}");
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0
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}
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fn write_pci_u8(
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&self,
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_segment: u16,
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_bus: u8,
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_device: u8,
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_function: u8,
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_offset: u16,
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_value: u8,
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seg: u16,
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bus: u8,
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dev: u8,
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func: u8,
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off: u16,
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value: u8
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) {
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log::error!("write pci u8 {:X}", _device);
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log::error!("write pci u8 {seg:04X}:{bus:02X}:{dev:02X}.{func:01X}@{off:04X}={value:02X}");
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}
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fn write_pci_u16(
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&self,
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_segment: u16,
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_bus: u8,
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_device: u8,
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_function: u8,
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_offset: u16,
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_value: u16,
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seg: u16,
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bus: u8,
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dev: u8,
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func: u8,
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off: u16,
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value: u16
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) {
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log::error!("write pci u8 {:X}", _device);
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log::error!("write pci u16 {seg:04X}:{bus:02X}:{dev:02X}.{func:01X}@{off:04X}={value:04X}");
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}
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fn write_pci_u32(
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&self,
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_segment: u16,
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_bus: u8,
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_device: u8,
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_function: u8,
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_offset: u16,
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_value: u32,
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seg: u16,
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bus: u8,
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dev: u8,
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func: u8,
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off: u16,
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value: u32
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) {
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log::error!("write pci u8 {:X}", _device);
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log::error!("write pci u32 {seg:04X}:{bus:02X}:{dev:02X}.{func:01X}@{off:04X}={value:08X}");
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}
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}
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