Don't try to fetch BARs unless there is a matching driver

Fetching BARs will temporarily invalidate them, which could cause
crashes if a driver happens to access it at the same time. As we
don't yet use a single pcid instance, we don't know which devices
have a driver attached or not. As such approximate this as the set
of devices for which the current pcid instance would load a driver.
This commit is contained in:
bjorn3
2024-01-22 17:54:38 +01:00
parent f624ed92f7
commit 545596f296
+16 -13
View File
@@ -207,9 +207,8 @@ pub struct State {
}
fn handle_parsed_header(state: Arc<State>, config: &Config, addr: PciAddress, header: PciHeader) {
let raw_class: u8 = header.class().into();
let mut string = format!("PCI {} {:>04X}:{:>04X} {:>02X}.{:>02X}.{:>02X}.{:>02X} {:?}",
addr, header.vendor_id(), header.device_id(), raw_class,
addr, header.vendor_id(), header.device_id(), header.class(),
header.subclass(), header.interface(), header.revision(), header.class());
let device_type = DeviceType::from((header.class(), header.subclass()));
match device_type {
@@ -229,17 +228,6 @@ fn handle_parsed_header(state: Arc<State>, config: &Config, addr: PciAddress, he
},
_ => (),
}
let bars = header.bars(&state.pcie);
for (i, bar) in bars.iter().enumerate() {
match bar {
PciBar::None => {},
PciBar::Memory32{addr,..} => string.push_str(&format!(" {i}={addr:08X}")),
PciBar::Memory64{addr,..} => string.push_str(&format!(" {i}={addr:016X}")),
PciBar::Port(port) => string.push_str(&format!(" {i}=P{port:04X}")),
}
}
info!("{}", string);
for driver in config.drivers.iter() {
@@ -251,6 +239,21 @@ fn handle_parsed_header(state: Arc<State>, config: &Config, addr: PciAddress, he
continue;
};
let mut string = String::new();
let bars = header.bars(&state.pcie);
for (i, bar) in bars.iter().enumerate() {
match bar {
PciBar::None => {},
PciBar::Memory32 { addr, .. } => string.push_str(&format!(" {i}={addr:08X}")),
PciBar::Memory64 { addr, .. } => string.push_str(&format!(" {i}={addr:016X}")),
PciBar::Port(port) => string.push_str(&format!(" {i}=P{port:04X}")),
}
}
if !string.is_empty() {
info!(" BAR{}", string);
}
// Enable bus mastering, memory space, and I/O space
unsafe {
let mut data = state.pcie.read(addr, 0x04);