Merge branch 'bug_fixes' into 'master'
bug fixes See merge request redox-os/drivers!180
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@@ -290,7 +290,7 @@ impl Intel8259x {
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self.wait_write_reg(IXGBE_EEC, IXGBE_EEC_ARD);
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// section 4.6.3 - wait for dma initialization done
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self.wait_write_reg(IXGBE_RDRXCTL, IXGBE_RDRXCTL_DMAIDONE);
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self.wait_write_reg(IXGBE_RDRXCTL, IXGBE_RDRXCTL_DMAIDONE | IXGBE_RDRXCTL_RESERVED_BITS);
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// section 4.6.4 - initialize link (auto negotiation)
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self.init_link();
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@@ -314,9 +314,6 @@ impl Intel8259x {
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// section 4.6.3.9 - enable interrupts
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self.enable_msix_interrupt(0);
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// enable promisc mode by default to make testing easier
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self.set_promisc(true);
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// wait some time for the link to come up
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self.wait_for_link();
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}
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@@ -380,6 +377,10 @@ impl Intel8259x {
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// probably a broken feature, this flag is initialized with 1 but has to be set to 0
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self.clear_flag(IXGBE_DCA_RXCTRL(i), 1 << 12);
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// enable promisc mode by default to make testing easier
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// this has to be done when the rxctrl.rxen bit is not set
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self.set_promisc(true);
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// start rx
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self.write_flag(IXGBE_RXCTRL, IXGBE_RXCTRL_RXEN);
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}
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@@ -397,7 +398,7 @@ impl Intel8259x {
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}
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// required when not using DCB/VTd
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self.write_reg(IXGBE_DTXMXSZRQ, 0xffff);
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self.write_reg(IXGBE_DTXMXSZRQ, 0xfff);
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self.clear_flag(IXGBE_RTTDCS, IXGBE_RTTDCS_ARBDIS);
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// configure a single transmit queue/ring
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@@ -14,6 +14,7 @@ pub const IXGBE_EEC: u32 = 0x10010;
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pub const IXGBE_EEC_ARD: u32 = 0x00000200; /* EEPROM Auto Read Done */
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pub const IXGBE_RDRXCTL: u32 = 0x02F00;
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pub const IXGBE_RDRXCTL_RESERVED_BITS: u32 = 1 << 25 | 1 << 26;
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pub const IXGBE_RDRXCTL_DMAIDONE: u32 = 0x00000008; /* DMA init cycle done */
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pub const IXGBE_AUTOC: u32 = 0x042A0;
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