Fix profiling and add check to CI

.gitlab-ci.yml

@@ -5,13 +5,14 @@ variables:
 
 workflow:
   rules:
-    - if: '$CI_COMMIT_BRANCH == "master" && $CI_PROJECT_NAMESPACE == "redox-os"'
+    - if: '$CI_PROJECT_NAMESPACE == "redox-os"'
     - if: '$CI_MERGE_REQUEST_TARGET_BRANCH_NAME == "master"'
 
 stages:
   - build
   - cross-build
   - test
+  - other-features
   # TODO: benchmarks and profiling (maybe manually enabled for relevant MRs)?
 
 x86_64:
@@ -82,3 +83,12 @@ x86_64:relibc:
   variables:
     ARCH: "x86_64"
     TARGET: "x86_64-unknown-redox"
+
+profiling-compile:
+  stage: other-features
+  allow_failure: true
+  script:
+    make check
+  variables:
+    ARCH: "x86_64"
+    KERNEL_CHECK_FEATURES: profiling

Makefile

@@ -1,3 +1,5 @@
+.PHONY: all check
+
 SOURCE:=$(dir $(realpath $(lastword $(MAKEFILE_LIST))))
 BUILD?=$(CURDIR)
 export RUST_TARGET_PATH=$(SOURCE)/targets
@@ -49,3 +51,13 @@ $(BUILD)/kernel: $(BUILD)/kernel.all
 		--strip-debug \
 		"$(BUILD)/kernel.all" \
 		"$(BUILD)/kernel"
+
+KERNEL_CHECK_FEATURES?=
+
+check:
+	cargo check \
+		--bin kernel \
+		--manifest-path "$(MANIFEST)" \
+		--target "$(TARGET_SPEC)" \
+		-Z build-std=core,alloc -Zbuild-std-features=compiler-builtins-mem \
+		--features=$(KERNEL_CHECK_FEATURES)

src/arch/x86_shared/idt.rs

@@ -26,7 +26,7 @@ use spin::RwLock;
 
 #[repr(C)]
 pub struct Idt {
-    entries: [IdtEntry; 256],
+    pub(crate) entries: [IdtEntry; 256],
     reservations: [AtomicU32; 8],
     backup_stack_end: usize,
 }
@@ -49,7 +49,7 @@ impl Idt {
     }
 
     #[inline]
-    fn set_reserved(&self, index: u8, reserved: bool) {
+    pub(crate) fn set_reserved(&self, index: u8, reserved: bool) {
         let byte_index = index / 32;
         let bit = index % 32;
 
@@ -58,7 +58,7 @@ impl Idt {
     }
 
     #[inline]
-    fn set_reserved_mut(&mut self, index: u8, reserved: bool) {
+    pub(crate) fn set_reserved_mut(&mut self, index: u8, reserved: bool) {
         let byte_index = index / 32;
         let bit = index % 32;
 
@@ -73,7 +73,7 @@ const BACKUP_STACK_SIZE: usize = PAGE_SIZE << 4;
 static INIT_BSP_IDT: SyncUnsafeCell<Idt> = SyncUnsafeCell::new(Idt::new());
 
 // TODO: VecMap?
-static IDTS: RwLock<HashMap<LogicalCpuId, &'static mut Idt>> =
+pub(crate) static IDTS: RwLock<HashMap<LogicalCpuId, &'static mut Idt>> =
     RwLock::new(HashMap::with_hasher(DefaultHashBuilder::new()));
 
 #[inline]

src/profiling.rs

@@ -15,7 +15,6 @@ use crate::{
 #[cfg(feature = "profiling")]
 use crate::{
     idt::Idt,
-    interrupt,
     interrupt::{self, irq::aux_timer, InterruptStack},
 };
 

src/scheme/debug.rs

@@ -51,6 +51,7 @@ enum SpecialFds {
     CtlProfiling = -4isize as usize,
 
     SchemeRoot = -5isize as usize,
+    // NOTE: when adding new entries, ensure are checked correctly by the profiling code
 }
 
 impl KernelScheme for DebugScheme {
@@ -168,8 +169,11 @@ impl KernelScheme for DebugScheme {
             return Err(Error::new(EBADF));
         }
 
+        // TODO: add "try_from_raw" or similar to prevent future bugs
         #[cfg(feature = "profiling")]
-        if handle.num != SpecialFds::Default as usize {
+        if handle.num != SpecialFds::Default as usize
+            && handle.num != SpecialFds::NoPreserve as usize
+        {
             return crate::profiling::drain_buffer(
                 crate::cpu_set::LogicalCpuId::new(handle.num as u32),
                 buf,