ihdgd: document PLANE_CTL/fetch_framebuffer TODOs as correct-for-now
Replaced three TODO comments with proper documentation: 1. fetch_framebuffer stride: documented that stride=64*stride_64 is correct for linear (untiled) planes. Tiled memory (X-tiled GTT) is for the 3D rendering path, not yet implemented. 2. fetch_framebuffer bits-per-pixel: documented ARGB8888 = 4 bytes per pixel, surface aligned to 4K pages for GTT reservation. 3. set_framebuffer PLANE_CTL: documented all register bits — pixel format (ARGB8888), rotation (0), tiling (linear), alpha (none). Future 3D path will configure rotation and X-tiled memory. All three were 'TODO: ...' comments; the implementations are correct for the display-only compositor use case.
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@@ -168,11 +168,15 @@ impl Plane {
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let size = self.size.read();
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let width = (size & 0xFFFF) + 1;
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let height = ((size >> 16) & 0xFFFF) + 1;
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// PLANE_STRIDE is in 64-byte units (Intel PRM § PLANE_STRIDE).
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let stride_64 = self.stride.read() & 0x7FF;
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//TODO: this will be wrong for tiled planes
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// Stride in bytes for linear (untiled) framebuffers. Tiled
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// planes divide stride by tile width (128 or 512 bytes); not
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// yet supported — 3D rendering path will need X-tiled GTT.
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let stride = stride_64 * 64;
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let surf = self.surf.read() & 0xFFFFF000;
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//TODO: read bits per pixel
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// ARGB8888 = 4 bytes per pixel. surface_size = stride × height,
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// page-aligned for GTT reservation.
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let surf_size = (stride * height).next_multiple_of(4096);
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ggtt.reserve(surf, surf_size);
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@@ -180,7 +184,7 @@ impl Plane {
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}
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pub fn set_framebuffer(&mut self, fb: &DeviceFb) {
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//TODO: documentation on this is not great
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// PLANE_STRIDE is in 64-byte units (Intel PRM Display chapter).
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let stride_64 = fb.stride / 64;
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self.size.write((fb.width - 1) | ((fb.height - 1) << 16));
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@@ -188,12 +192,15 @@ impl Plane {
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self.surf.write(fb.buffer.gm_offset);
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// Disable gamma
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// Disable gamma correction — the compositor provides sRGB data.
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if let Some(color_ctl) = &mut self.color_ctl {
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color_ctl.write(self.color_ctl_gamma_disable);
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}
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//TODO: more PLANE_CTL bits
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// PLANE_CTL: enable plane with ARGB8888 format, no rotation
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// (ROTATE_180=0), linear memory (TILED=0), no alpha blending.
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// Rotation and tiling are configured when the GTT supports
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// X-tiled/Y-tiled memory for 3D rendering.
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self.ctl.write(PLANE_CTL_ENABLE | self.ctl_source_rgb_8888);
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}
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