Merge branch 'less_verbose_boot' into 'master'

Reduce verbosity of debug logs during booting

See merge request redox-os/drivers!258

graphics/driver-graphics/src/lib.rs

@@ -154,8 +154,6 @@ impl<T: GraphicsAdapter> Scheme for GraphicsScheme<T> {
         let vt = screen.next().unwrap_or("").parse::<usize>().unwrap();
         let id = screen.next().unwrap_or("").parse::<usize>().unwrap_or(0);
 
-        dbg!(vt, id);
-
         if id >= self.adapter.displays().len() {
             return Err(Error::new(EINVAL));
         }
@@ -233,11 +231,11 @@ impl<T: GraphicsAdapter> Scheme for GraphicsScheme<T> {
     fn mmap_prep(
         &mut self,
         id: usize,
-        offset: u64,
-        size: usize,
-        flags: MapFlags,
+        _offset: u64,
+        _size: usize,
+        _flags: MapFlags,
     ) -> syscall::Result<usize> {
-        log::info!("KSMSG MMAP {} {:?} {} {}", id, flags, offset, size);
+        // log::trace!("KSMSG MMAP {} {:?} {} {}", id, _flags, _offset, _size);
         let handle = self.handles.get(&id).ok_or(Error::new(EINVAL))?;
         let Handle::Screen { vt, screen } = handle;
         let framebuffer = &self.vts_fb[vt][screen];

pcid/src/cfg_access/mod.rs

@@ -151,8 +151,8 @@ impl Mcfg {
             if table_filename.get(0..4) == Some(&MCFG_NAME) {
                 let bytes = fs::read(table_path)?.into_boxed_slice();
                 match Mcfg::parse(&*bytes) {
-                    Some((mcfg, allocs)) => {
-                        log::info!("MCFG {mcfg:?} ALLOCS {allocs:?}");
+                    Some((_mcfg, allocs)) => {
+                        log::info!("MCFG ALLOCS {:?}", allocs.0);
                         return f(allocs, Vec::new(), [u32::MAX, u32::MAX, u32::MAX, u32::MAX]);
                     }
                     None => {

pcid/src/driver_interface/cap.rs

@@ -10,12 +10,12 @@ pub struct VendorSpecificCapability {
 impl VendorSpecificCapability {
     pub unsafe fn parse(addr: PciCapabilityAddress, access: &dyn ConfigRegionAccess) -> Self {
         let dword = access.read(addr.address, addr.offset);
-        let next = (dword >> 8) & 0xFF;
         let length = ((dword >> 16) & 0xFF) as u16;
-        log::info!(
-            "Vendor specific offset: {:#02x} next: {next:#02x} cap len: {length:#02x}",
-            addr.offset
-        );
+        // let next = (dword >> 8) & 0xFF;
+        // log::trace!(
+        //     "Vendor specific offset: {:#02x} next: {next:#02x} cap len: {length:#02x}",
+        //     addr.offset
+        // );
         let data = if length > 0 {
             assert!(
                 length > 3 && length % 4 == 0,

virtio-core/src/probe.rs

@@ -122,8 +122,6 @@ pub fn probe_device(pcid_handle: &mut PciFunctionHandle) -> Result<Device, Error
 
             _ => unreachable!(),
         }
-
-        log::trace!("virtio-core::device-probe: {capability:?}");
     }
 
     let common_addr = common_addr.expect("virtio common capability missing");