drm: cursor plane ioctl — DRM_IOCTL_MODE_CURSOR (Phase 3 complete)
Add hardware cursor plane support through the DRM ioctl interface. scheme.rs: - DRM_IOCTL_MODE_CURSOR (0xA0 + 0x3B): standard DRM cursor ioctl with set (flags & 0x01) and move (flags & 0x02) sub-commands - Cursor set: program FB handle + hot_x/hot_y via driver.cursor_set() - Cursor move: update position via driver.cursor_move() driver.rs (GpuDriver trait): - cursor_set(crtc_id, fb_handle, hot_x, hot_y): set cursor surface - cursor_move(crtc_id, x, y): update cursor position - Default implementations return Unsupported Intel driver (mod.rs): - cursor_set(): map FB → GGTT, set surface, enable cursor plane - cursor_move(): update CURPOS register with clamped coords Phase 3 (Full KMS): 5/5 — COMPLETE ✅ All 5 phases of INTEL-DRIVER-MODERNIZATION-PLAN now complete: 0: Display Foundation ✅ 1: DP/HDMI ✅ 2: Gen12 Display ✅ 3: Full KMS ✅ 4: Render Path ✅
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@@ -103,6 +103,13 @@ pub trait GpuDriver: Send + Sync {
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fn page_flip(&self, crtc_id: u32, fb_handle: u32, flags: u32) -> Result<u64>;
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fn get_vblank(&self, crtc_id: u32) -> Result<u64>;
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fn cursor_set(&self, _crtc_id: u32, _fb_handle: u32, _hot_x: u32, _hot_y: u32) -> Result<()> {
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Err(DriverError::Unsupported("hardware cursor unavailable"))
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}
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fn cursor_move(&self, _crtc_id: u32, _x: i32, _y: i32) -> Result<()> {
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Err(DriverError::Unsupported("hardware cursor movement unavailable"))
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}
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fn gem_create(&self, size: u64, width: u32, height: u32) -> Result<GemHandle>;
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fn gem_close(&self, handle: GemHandle) -> Result<()>;
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fn gem_mmap(&self, handle: GemHandle) -> Result<usize>;
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@@ -67,6 +67,7 @@ const DRM_IOCTL_MODE_OBJ_SETPROPERTY: usize = DRM_IOCTL_BASE + 0x55;
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const DRM_IOCTL_MODE_GETPLANERESOURCES: usize = DRM_IOCTL_BASE + 0x56;
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const DRM_IOCTL_MODE_GETPLANE: usize = DRM_IOCTL_BASE + 0x57;
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const DRM_IOCTL_MODE_SETPLANE: usize = DRM_IOCTL_BASE + 0x58;
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const DRM_IOCTL_MODE_CURSOR: usize = DRM_IOCTL_BASE + 0x3B;
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const DRM_IOCTL_MODE_ADDFB2: usize = DRM_IOCTL_BASE + 0x59;
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const DRM_IOCTL_GET_PCI_INFO: usize = DRM_IOCTL_BASE + 0x60;
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const DRM_IOCTL_VIRTGPU_MAP: usize = 0x0041;
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@@ -1309,6 +1310,7 @@ impl DrmScheme {
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DRM_IOCTL_VIRTGPU_GET_CAPS => "VIRTGPU_GET_CAPS",
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DRM_IOCTL_VIRTGPU_RESOURCE_CREATE_BLOB => "VIRTGPU_RESOURCE_CREATE_BLOB",
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DRM_IOCTL_VIRTGPU_CONTEXT_INIT => "VIRTGPU_CONTEXT_INIT",
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DRM_IOCTL_MODE_CURSOR => "CURSOR",
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_ => "UNKNOWN",
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};
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log::info!(
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@@ -1442,6 +1444,24 @@ impl DrmScheme {
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seqno.to_le_bytes().to_vec()
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}
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DRM_IOCTL_MODE_CURSOR => {
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let flags = read_u32(payload, 0)?;
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let crtc_id = read_u32(payload, 4)?;
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if flags & 0x01 != 0 {
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let fb_handle = read_u32(payload, 12)?;
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let hot_x = read_u32(payload, 16)?;
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let hot_y = read_u32(payload, 20)?;
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self.driver.cursor_set(crtc_id, fb_handle, hot_x, hot_y)
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.map_err(driver_to_syscall)?;
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} else if flags & 0x02 != 0 {
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let x = read_u32(payload, 8)? as i32;
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let y = read_u32(payload, 12)? as i32;
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self.driver.cursor_move(crtc_id, x, y)
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.map_err(driver_to_syscall)?;
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}
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Vec::new()
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}
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DRM_IOCTL_MODE_CREATE_DUMB => {
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let mut req = decode_wire::<DrmCreateDumbWire>(payload)?;
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info!(
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