intel: Phase 0 — display foundation for Gen9
Add register abstraction and hardware initialization modules
for Intel GPU display support (Skylake/Kaby Lake/Coffee Lake).
New modules:
- info.rs: device capability table with 44 device IDs from Gen9—Gen12.7
IntelDeviceInfo struct with generation, display version, pipe/port
counts, DMC firmware key lookup
- regs.rs: IntelRegs trait — per-generation register access abstraction
covering forcewake, power wells, CDCLK, DMC, GMBUS, pipes, planes,
DDIs, cursors, vblank, and GFX flush
- regs_gen9.rs: Gen9 (SKL/KBL/CFL) register constants implementing
IntelRegs trait — verified against Linux i915 intel_display_regs.h
and intel_gmbus_regs.h
- gmbus.rs: GMBUS I2C controller for real EDID reads via hardware
Ported from Linux intel_gmbus.c — implements init, read, read_edid
with pin pair selection, hardware ready polling, SDAST FIFO reads,
NAK detection, and 50ms timeout
- display_power.rs: Gen9 display power well initialization
Enables all display-required power domains (PW1, PW2, DDI_A-E,
AUX_A-D) via POWER_WELL_CTL register with status polling
- display_dmc.rs: DMC firmware upload to hardware
Parses CSS header, uploads payload to MMIO SRAM, enables DMC_CTRL,
polls DMC_STATUS for load confirmation
- display_cdclk.rs: core display clock programming for Gen9
Supports 337.5/450/540/675 MHz frequencies, required CDCLK
calculation from mode pixel clocks
Modified:
- mod.rs: declare new modules, add IntelDeviceInfo, Gen9Regs,
GmbusController, DisplayPower, DmcFirmware, DisplayClock to
IntelDriver struct. Constructor initializes all modules in order:
forcewake → power wells → DMC firmware → CDCLK → GMBUS → display
Linux reference: local/reference/linux-7.1/drivers/gpu/drm/i915/display/
Next: regs_xe2.rs for Xe2/Lunar Lake/Battlemage (display ver 20+)
vasilito
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