vasilito
cb424d7448
verify-patch-sanity.py validates every active recipe .patch has internally- consistent hunk line counts — catching the 'malformed patch at line N' failure at commit/CI/preflight time instead of hours into a cook. This cycle hit that class three times (qtwaylandscanner, sddm, xwayland), each only discovered when cookbook tried to apply the patch. Running it across the repo found 29 latent malformed patches (validated against GNU patch: e.g. relibc/P3-sysv-ipc reproduces 'malformed patch at line 22'). They were harmless only because they sit in vendored recipes (baked, not re- applied) — but would fail on any version-bump re-derivation. --fix recounts the hunk headers (body untouched) and repaired all 29. Wired into build-preflight.sh (Phase 1.0D) and redbear-ci.yml, with a unit test (test-patch-sanity.sh). Skips archived/legacy trees and unvalidatable formats (empty placeholders, bare-@@ git hunks).
47 lines
1.7 KiB
LLVM
47 lines
1.7 KiB
LLVM
; RUN: opt %loadNPMPolly -polly-process-unprofitable -passes=polly-codegen -disable-output < %s
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;
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; CHECK: store i32 %tmp14_p_scalar_, ptr %tmp14.s2a
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; CHECK: %tmp14.final_reload = load i32, ptr %tmp14.s2a
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; CHECK: %tmp17b.final_reload = load i32, ptr %tmp17b.preload.s2a
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; CHECK: %tmp17.final_reload = load i32, ptr %tmp17.preload.s2a
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;
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target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
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; Function Attrs: nounwind uwtable
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define void @hoge(ptr %arg, i32 %arg4) #0 {
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bb:
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br label %bb5
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bb5: ; preds = %bb
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br i1 undef, label %bb6, label %bb18
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bb6: ; preds = %bb5
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%tmp8 = getelementptr inbounds i8, ptr %arg, i64 4
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%tmp9 = getelementptr inbounds i8, ptr %tmp8, i64 20
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br label %bb10
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bb10: ; preds = %bb10, %bb6
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%tmp11 = phi i32 [ %tmp12, %bb10 ], [ 2, %bb6 ]
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%tmp12 = add nuw nsw i32 %tmp11, 1
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br i1 false, label %bb10, label %bb13
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bb13: ; preds = %bb10
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%tmp14 = load i32, ptr %tmp9, align 4
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%tmp15 = getelementptr inbounds i8, ptr %tmp9, i64 4
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%tmp17 = load i32, ptr %tmp15, align 4
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store i32 %tmp17, ptr %tmp9, align 4
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%tmp15b = getelementptr inbounds i8, ptr %tmp9, i64 8
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%tmp17b = load i32, ptr %tmp15b, align 4
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store i32 %tmp17b, ptr %tmp9, align 4
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br label %bb19
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bb18: ; preds = %bb5
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br label %bb19
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bb19: ; preds = %bb18, %bb13
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%tmp20 = phi i32 [ %tmp14, %bb13 ], [ %arg4, %bb18 ]
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%tmp21 = phi i32 [ %tmp17, %bb13 ], [ %arg4, %bb18 ]
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%tmp22 = phi i32 [ %tmp17b, %bb13 ], [ %arg4, %bb18 ]
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unreachable
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}
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