Files
RedBear-OS/local/recipes/dev/libclc/source/llvm/test/MachineVerifier/verify-regops.mir
T
vasilito cb424d7448 build: static patch-sanity linter (shift-left the malformed-patch class)
verify-patch-sanity.py validates every active recipe .patch has internally-
consistent hunk line counts — catching the 'malformed patch at line N' failure
at commit/CI/preflight time instead of hours into a cook. This cycle hit that
class three times (qtwaylandscanner, sddm, xwayland), each only discovered when
cookbook tried to apply the patch.

Running it across the repo found 29 latent malformed patches (validated against
GNU patch: e.g. relibc/P3-sysv-ipc reproduces 'malformed patch at line 22').
They were harmless only because they sit in vendored recipes (baked, not re-
applied) — but would fail on any version-bump re-derivation. --fix recounts the
hunk headers (body untouched) and repaired all 29.

Wired into build-preflight.sh (Phase 1.0D) and redbear-ci.yml, with a unit test
(test-patch-sanity.sh). Skips archived/legacy trees and unvalidatable formats
(empty placeholders, bare-@@ git hunks).
2026-08-01 05:13:02 +03:00

38 lines
1.7 KiB
YAML

# RUN: not --crash llc -mtriple=i686 -o - %s -run-pass=none -verify-machineinstrs \
# RUN: 2>&1 | FileCheck %s
# REQUIRES: x86-registered-target
#
# Check that MachineVerifier catches corrupt operands where MO->isReg()
# returns true, but the descriptor says it should be an OPERAND_IMMEDIATE or
# OPERAND_PCREL. Conversely, if MO->isReg() (and MO->isFI()) returns false,
# check that not an OPERAND_REGISTER is expected.
# CHECK-LABEL: fun
# CHECK: *** Bad machine code: Expected a register operand. ***
# CHECK: - instruction: %1:gr32 = XOR32rm -1, %fixed-stack.1, 1, $noreg, 0, $noreg, implicit-def dead $eflags :: (load (s32) from %fixed-stack.1, align 8)
# CHECK: - operand 1: -1
# CHECK: *** Bad machine code: Expected a non-register operand. ***
# CHECK: - instruction: %2:gr32 = OR32ri %1:gr32(tied-def 0), %0:gr32, implicit-def dead $eflags
# CHECK: - operand 2: %0:gr32
name: fun
tracksRegLiveness: true
fixedStack:
- { id: 1, offset: 8, size: 4, alignment: 8, isImmutable: true }
- { id: 3, size: 4, alignment: 16, isImmutable: true }
body: |
bb.0:
%0:gr32 = MOV32rm %fixed-stack.3, 1, $noreg, 0, $noreg :: (load (s32) from %fixed-stack.3, align 16)
; Was: %1:gr32 = XOR32rm %0, %fixed-stack.1, 1, $noreg, 0, $noreg, implicit-def dead $eflags :: (load (s32) from %fixed-stack.1, align 8)
%1:gr32 = XOR32rm -1, %fixed-stack.1, 1, $noreg, 0, $noreg, implicit-def dead $eflags :: (load (s32) from %fixed-stack.1, align 8)
; Was: %2:gr32 = OR32ri %1, -256, implicit-def dead $eflags
%2:gr32 = OR32ri %1, %0, implicit-def dead $eflags
%3:gr32 = MOV32ri -1
$eax = COPY %2
$edx = COPY %3
RET 0, $eax, $edx
...