vasilito
cb424d7448
verify-patch-sanity.py validates every active recipe .patch has internally- consistent hunk line counts — catching the 'malformed patch at line N' failure at commit/CI/preflight time instead of hours into a cook. This cycle hit that class three times (qtwaylandscanner, sddm, xwayland), each only discovered when cookbook tried to apply the patch. Running it across the repo found 29 latent malformed patches (validated against GNU patch: e.g. relibc/P3-sysv-ipc reproduces 'malformed patch at line 22'). They were harmless only because they sit in vendored recipes (baked, not re- applied) — but would fail on any version-bump re-derivation. --fix recounts the hunk headers (body untouched) and repaired all 29. Wired into build-preflight.sh (Phase 1.0D) and redbear-ci.yml, with a unit test (test-patch-sanity.sh). Skips archived/legacy trees and unvalidatable formats (empty placeholders, bare-@@ git hunks).
179 lines
4.2 KiB
LLVM
179 lines
4.2 KiB
LLVM
; RUN: llvm-dis < %s.bc| FileCheck %s
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; RUN: verify-uselistorder < %s.bc
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; BinaryIntOperation.3.2.ll.bc was generated by passing this file to llvm-as-3.2.
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; The test checks that LLVM does not misread binary integer instructions from
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; older bitcode files.
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define void @add(i1 %x1, i8 %x2 ,i16 %x3, i32 %x4, i64 %x5){
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entry:
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; CHECK: %res1 = add i1 %x1, %x1
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%res1 = add i1 %x1, %x1
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; CHECK-NEXT: %res2 = add i8 %x2, %x2
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%res2 = add i8 %x2, %x2
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; CHECK-NEXT: %res3 = add i16 %x3, %x3
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%res3 = add i16 %x3, %x3
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; CHECK-NEXT: %res4 = add i32 %x4, %x4
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%res4 = add i32 %x4, %x4
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; CHECK-NEXT: %res5 = add i64 %x5, %x5
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%res5 = add i64 %x5, %x5
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; CHECK: %res6 = add nuw i1 %x1, %x1
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%res6 = add nuw i1 %x1, %x1
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; CHECK: %res7 = add nsw i1 %x1, %x1
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%res7 = add nsw i1 %x1, %x1
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; CHECK: %res8 = add nuw nsw i1 %x1, %x1
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%res8 = add nuw nsw i1 %x1, %x1
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ret void
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}
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define void @addvec8NuwNsw(<2 x i8> %x1, <3 x i8> %x2 ,<4 x i8> %x3, <8 x i8> %x4, <16 x i8> %x5){
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entry:
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; CHECK: %res1 = add nuw nsw <2 x i8> %x1, %x1
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%res1 = add nuw nsw <2 x i8> %x1, %x1
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; CHECK-NEXT: %res2 = add nuw nsw <3 x i8> %x2, %x2
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%res2 = add nuw nsw <3 x i8> %x2, %x2
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; CHECK-NEXT: %res3 = add nuw nsw <4 x i8> %x3, %x3
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%res3 = add nuw nsw <4 x i8> %x3, %x3
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; CHECK-NEXT: %res4 = add nuw nsw <8 x i8> %x4, %x4
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%res4 = add nuw nsw <8 x i8> %x4, %x4
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; CHECK-NEXT: %res5 = add nuw nsw <16 x i8> %x5, %x5
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%res5 = add nuw nsw <16 x i8> %x5, %x5
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ret void
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}
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define void @addvec16NuwNsw(<2 x i16> %x1, <3 x i16> %x2 ,<4 x i16> %x3, <8 x i16> %x4, <16 x i16> %x5){
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entry:
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; CHECK: %res1 = add nuw nsw <2 x i16> %x1, %x1
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%res1 = add nuw nsw <2 x i16> %x1, %x1
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; CHECK-NEXT: %res2 = add nuw nsw <3 x i16> %x2, %x2
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%res2 = add nuw nsw <3 x i16> %x2, %x2
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; CHECK-NEXT: %res3 = add nuw nsw <4 x i16> %x3, %x3
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%res3 = add nuw nsw <4 x i16> %x3, %x3
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; CHECK-NEXT: %res4 = add nuw nsw <8 x i16> %x4, %x4
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%res4 = add nuw nsw <8 x i16> %x4, %x4
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; CHECK-NEXT: %res5 = add nuw nsw <16 x i16> %x5, %x5
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%res5 = add nuw nsw <16 x i16> %x5, %x5
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ret void
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}
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define void @addvec32NuwNsw(<2 x i32> %x1, <3 x i32> %x2 ,<4 x i32> %x3, <8 x i32> %x4, <16 x i32> %x5){
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entry:
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; CHECK: %res1 = add nuw nsw <2 x i32> %x1, %x1
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%res1 = add nuw nsw <2 x i32> %x1, %x1
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; CHECK-NEXT: %res2 = add nuw nsw <3 x i32> %x2, %x2
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%res2 = add nuw nsw <3 x i32> %x2, %x2
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; CHECK-NEXT: %res3 = add nuw nsw <4 x i32> %x3, %x3
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%res3 = add nuw nsw <4 x i32> %x3, %x3
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; CHECK-NEXT: %res4 = add nuw nsw <8 x i32> %x4, %x4
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%res4 = add nuw nsw <8 x i32> %x4, %x4
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; CHECK-NEXT: %res5 = add nuw nsw <16 x i32> %x5, %x5
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%res5 = add nuw nsw <16 x i32> %x5, %x5
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ret void
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}
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define void @addvec64NuwNsw(<2 x i64> %x1, <3 x i64> %x2 ,<4 x i64> %x3, <8 x i64> %x4, <16 x i64> %x5){
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entry:
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; CHECK: %res1 = add nuw nsw <2 x i64> %x1, %x1
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%res1 = add nuw nsw <2 x i64> %x1, %x1
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; CHECK-NEXT: %res2 = add nuw nsw <3 x i64> %x2, %x2
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%res2 = add nuw nsw <3 x i64> %x2, %x2
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; CHECK-NEXT: %res3 = add nuw nsw <4 x i64> %x3, %x3
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%res3 = add nuw nsw <4 x i64> %x3, %x3
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; CHECK-NEXT: %res4 = add nuw nsw <8 x i64> %x4, %x4
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%res4 = add nuw nsw <8 x i64> %x4, %x4
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; CHECK-NEXT: %res5 = add nuw nsw <16 x i64> %x5, %x5
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%res5 = add nuw nsw <16 x i64> %x5, %x5
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ret void
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}
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define void @sub(i8 %x1){
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entry:
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; CHECK: %res1 = sub i8 %x1, %x1
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%res1 = sub i8 %x1, %x1
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; CHECK: %res2 = sub nuw i8 %x1, %x1
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%res2 = sub nuw i8 %x1, %x1
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; CHECK: %res3 = sub nsw i8 %x1, %x1
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%res3 = sub nsw i8 %x1, %x1
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; CHECK: %res4 = sub nuw nsw i8 %x1, %x1
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%res4 = sub nuw nsw i8 %x1, %x1
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ret void
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}
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define void @mul(i8 %x1){
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entry:
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; CHECK: %res1 = mul i8 %x1, %x1
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%res1 = mul i8 %x1, %x1
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ret void
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}
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define void @udiv(i8 %x1){
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entry:
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; CHECK: %res1 = udiv i8 %x1, %x1
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%res1 = udiv i8 %x1, %x1
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; CHECK-NEXT: %res2 = udiv exact i8 %x1, %x1
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%res2 = udiv exact i8 %x1, %x1
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ret void
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}
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define void @sdiv(i8 %x1){
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entry:
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; CHECK: %res1 = sdiv i8 %x1, %x1
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%res1 = sdiv i8 %x1, %x1
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; CHECK-NEXT: %res2 = sdiv exact i8 %x1, %x1
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%res2 = sdiv exact i8 %x1, %x1
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ret void
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}
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define void @urem(i32 %x1){
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entry:
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; CHECK: %res1 = urem i32 %x1, %x1
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%res1 = urem i32 %x1, %x1
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ret void
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}
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define void @srem(i32 %x1){
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entry:
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; CHECK: %res1 = srem i32 %x1, %x1
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%res1 = srem i32 %x1, %x1
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ret void
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}
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