cb424d7448
verify-patch-sanity.py validates every active recipe .patch has internally- consistent hunk line counts — catching the 'malformed patch at line N' failure at commit/CI/preflight time instead of hours into a cook. This cycle hit that class three times (qtwaylandscanner, sddm, xwayland), each only discovered when cookbook tried to apply the patch. Running it across the repo found 29 latent malformed patches (validated against GNU patch: e.g. relibc/P3-sysv-ipc reproduces 'malformed patch at line 22'). They were harmless only because they sit in vendored recipes (baked, not re- applied) — but would fail on any version-bump re-derivation. --fix recounts the hunk headers (body untouched) and repaired all 29. Wired into build-preflight.sh (Phase 1.0D) and redbear-ci.yml, with a unit test (test-patch-sanity.sh). Skips archived/legacy trees and unvalidatable formats (empty placeholders, bare-@@ git hunks).
408 lines
12 KiB
C++
408 lines
12 KiB
C++
//===-- AArch64TargetParser - Parser for AArch64 features -------*- C++ -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This file implements a target parser to recognise AArch64 hardware features
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// such as FPU/CPU/ARCH and extension names.
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//
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//===----------------------------------------------------------------------===//
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#include "llvm/TargetParser/AArch64TargetParser.h"
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#include "llvm/Support/Debug.h"
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#include "llvm/Support/Format.h"
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#include "llvm/Support/raw_ostream.h"
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#include "llvm/TargetParser/ARMTargetParserCommon.h"
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#include "llvm/TargetParser/Triple.h"
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#include <cctype>
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#include <vector>
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#define DEBUG_TYPE "target-parser"
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using namespace llvm;
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#define EMIT_FMV_INFO
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#include "llvm/TargetParser/AArch64TargetParserDef.inc"
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static unsigned checkArchVersion(llvm::StringRef Arch) {
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if (Arch.size() >= 2 && Arch[0] == 'v' && std::isdigit(Arch[1]))
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return (Arch[1] - 48);
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return 0;
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}
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const AArch64::ArchInfo *AArch64::getArchForCpu(StringRef CPU) {
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// Note: this now takes cpu aliases into account
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std::optional<CpuInfo> Cpu = parseCpu(CPU);
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if (!Cpu)
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return nullptr;
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return &Cpu->Arch;
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}
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std::optional<AArch64::ArchInfo> AArch64::ArchInfo::findBySubArch(StringRef SubArch) {
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for (const auto *A : AArch64::ArchInfos)
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if (A->getSubArch() == SubArch)
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return *A;
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return {};
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}
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std::optional<AArch64::FMVInfo> lookupFMVByID(AArch64::ArchExtKind ExtID) {
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for (const AArch64::FMVInfo &Info : AArch64::getFMVInfo())
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if (Info.ID == ExtID)
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return Info;
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return {};
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}
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uint64_t AArch64::getFMVPriority(ArrayRef<StringRef> Features) {
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// Transitively enable the Arch Extensions which correspond to each feature.
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ExtensionSet FeatureBits;
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for (const StringRef Feature : Features) {
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std::optional<FMVInfo> FMV = parseFMVExtension(Feature);
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if (!FMV && Feature.starts_with('+')) {
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if (std::optional<ExtensionInfo> Info = targetFeatureToExtension(Feature))
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FMV = lookupFMVByID(Info->ID);
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}
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if (FMV && FMV->ID)
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FeatureBits.enable(*FMV->ID);
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}
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// Construct a bitmask for all the transitively enabled Arch Extensions.
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uint64_t PriorityMask = 0;
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for (const FMVInfo &Info : getFMVInfo())
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if (Info.ID && FeatureBits.Enabled.test(*Info.ID))
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PriorityMask |= (1ULL << Info.PriorityBit);
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return PriorityMask;
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}
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uint64_t AArch64::getCpuSupportsMask(ArrayRef<StringRef> Features) {
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// Transitively enable the Arch Extensions which correspond to each feature.
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ExtensionSet FeatureBits;
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for (const StringRef Feature : Features)
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if (std::optional<FMVInfo> Info = parseFMVExtension(Feature))
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if (Info->ID)
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FeatureBits.enable(*Info->ID);
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// Construct a bitmask for all the transitively enabled Arch Extensions.
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uint64_t FeaturesMask = 0;
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for (const FMVInfo &Info : getFMVInfo())
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if (Info.ID && FeatureBits.Enabled.test(*Info.ID))
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FeaturesMask |= (1ULL << Info.FeatureBit);
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return FeaturesMask;
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}
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bool AArch64::getExtensionFeatures(
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const AArch64::ExtensionBitset &InputExts,
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std::vector<StringRef> &Features) {
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for (const auto &E : Extensions)
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/* INVALID and NONE have no feature name. */
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if (InputExts.test(E.ID) && !E.PosTargetFeature.empty())
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Features.push_back(E.PosTargetFeature);
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return true;
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}
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StringRef AArch64::resolveCPUAlias(StringRef Name) {
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for (const auto &A : CpuAliases)
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if (A.AltName == Name)
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return A.Name;
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return Name;
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}
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StringRef AArch64::getArchExtFeature(StringRef ArchExt) {
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bool IsNegated = ArchExt.starts_with("no");
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StringRef ArchExtBase = IsNegated ? ArchExt.drop_front(2) : ArchExt;
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if (auto AE = parseArchExtension(ArchExtBase)) {
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assert(!(AE.has_value() && AE->NegTargetFeature.empty()));
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return IsNegated ? AE->NegTargetFeature : AE->PosTargetFeature;
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}
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return StringRef();
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}
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void AArch64::fillValidCPUArchList(SmallVectorImpl<StringRef> &Values) {
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for (const auto &C : CpuInfos)
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Values.push_back(C.Name);
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for (const auto &Alias : CpuAliases)
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// The apple-latest alias is backend only, do not expose it to clang's -mcpu.
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if (Alias.AltName != "apple-latest")
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Values.push_back(Alias.AltName);
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llvm::sort(Values);
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}
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bool AArch64::isX18ReservedByDefault(const Triple &TT) {
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return TT.isAndroid() || TT.isOSDarwin() || TT.isOSFuchsia() ||
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TT.isOSWindows() || TT.isOHOSFamily();
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}
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// Allows partial match, ex. "v8a" matches "armv8a".
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const AArch64::ArchInfo *AArch64::parseArch(StringRef Arch) {
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Arch = llvm::ARM::getCanonicalArchName(Arch);
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if (checkArchVersion(Arch) < 8)
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return {};
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StringRef Syn = llvm::ARM::getArchSynonym(Arch);
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for (const auto *A : ArchInfos) {
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if (A->Name.ends_with(Syn))
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return A;
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}
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return {};
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}
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std::optional<AArch64::ExtensionInfo>
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AArch64::parseArchExtension(StringRef ArchExt) {
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if (ArchExt.empty())
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return {};
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for (const auto &A : Extensions) {
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if (ArchExt == A.UserVisibleName || ArchExt == A.Alias)
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return A;
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}
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return {};
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}
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std::optional<AArch64::FMVInfo> AArch64::parseFMVExtension(StringRef FMVExt) {
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// FIXME introduce general alias functionality, or remove this exception.
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if (FMVExt == "rdma")
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FMVExt = "rdm";
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for (const auto &I : getFMVInfo()) {
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if (FMVExt == I.Name)
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return I;
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}
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return {};
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}
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std::optional<AArch64::ExtensionInfo>
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AArch64::targetFeatureToExtension(StringRef TargetFeature) {
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for (const auto &E : Extensions)
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if (TargetFeature == E.PosTargetFeature ||
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TargetFeature == E.NegTargetFeature)
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return E;
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return {};
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}
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std::optional<AArch64::CpuInfo> AArch64::parseCpu(StringRef Name) {
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// Resolve aliases first.
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Name = resolveCPUAlias(Name);
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// Then find the CPU name.
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for (const auto &C : CpuInfos)
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if (Name == C.Name)
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return C;
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return {};
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}
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void AArch64::PrintSupportedExtensions() {
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outs() << "All available -march extensions for AArch64\n\n"
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<< " " << left_justify("Name", 20)
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<< left_justify("Architecture Feature(s)", 55)
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<< "Description\n";
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for (const auto &Ext : Extensions) {
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// Extensions without a feature cannot be used with -march.
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if (!Ext.UserVisibleName.empty() && !Ext.PosTargetFeature.empty()) {
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outs() << " "
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<< format(Ext.Description.empty() ? "%-20s%s\n" : "%-20s%-55s%s\n",
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Ext.UserVisibleName.str().c_str(),
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Ext.ArchFeatureName.str().c_str(),
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Ext.Description.str().c_str());
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}
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}
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}
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void
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AArch64::printEnabledExtensions(const std::set<StringRef> &EnabledFeatureNames) {
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outs() << "Extensions enabled for the given AArch64 target\n\n"
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<< " " << left_justify("Architecture Feature(s)", 55)
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<< "Description\n";
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std::vector<ExtensionInfo> EnabledExtensionsInfo;
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for (const auto &FeatureName : EnabledFeatureNames) {
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std::string PosFeatureName = '+' + FeatureName.str();
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if (auto ExtInfo = targetFeatureToExtension(PosFeatureName))
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EnabledExtensionsInfo.push_back(*ExtInfo);
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}
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std::sort(EnabledExtensionsInfo.begin(), EnabledExtensionsInfo.end(),
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[](const ExtensionInfo &Lhs, const ExtensionInfo &Rhs) {
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return Lhs.ArchFeatureName < Rhs.ArchFeatureName;
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});
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for (const auto &Ext : EnabledExtensionsInfo) {
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outs() << " "
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<< format("%-55s%s\n",
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Ext.ArchFeatureName.str().c_str(),
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Ext.Description.str().c_str());
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}
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}
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const llvm::AArch64::ExtensionInfo &
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lookupExtensionByID(llvm::AArch64::ArchExtKind ExtID) {
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for (const auto &E : llvm::AArch64::Extensions)
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if (E.ID == ExtID)
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return E;
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llvm_unreachable("Invalid extension ID");
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}
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void AArch64::ExtensionSet::enable(ArchExtKind E) {
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if (Enabled.test(E))
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return;
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LLVM_DEBUG(llvm::dbgs() << "Enable " << lookupExtensionByID(E).UserVisibleName << "\n");
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Touched.set(E);
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Enabled.set(E);
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// Recursively enable all features that this one depends on. This handles all
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// of the simple cases, where the behaviour doesn't depend on the base
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// architecture version.
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for (auto Dep : ExtensionDependencies)
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if (E == Dep.Later)
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enable(Dep.Earlier);
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// Special cases for dependencies which vary depending on the base
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// architecture version.
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if (BaseArch) {
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// +fp16 implies +fp16fml for v8.4A+, but not v9.0-A+
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if (E == AEK_FP16 && BaseArch->is_superset(ARMV8_4A) &&
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!BaseArch->is_superset(ARMV9A))
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enable(AEK_FP16FML);
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// For v8.4A+ and v9.0A+, +crypto also enables +sha3 and +sm4.
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if (E == AEK_CRYPTO && BaseArch->is_superset(ARMV8_4A)) {
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enable(AEK_SHA3);
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enable(AEK_SM4);
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}
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}
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}
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void AArch64::ExtensionSet::disable(ArchExtKind E) {
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// -crypto always disables aes, sha2, sha3 and sm4, even for architectures
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// where the latter two would not be enabled by +crypto.
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if (E == AEK_CRYPTO) {
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disable(AEK_AES);
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disable(AEK_SHA2);
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disable(AEK_SHA3);
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disable(AEK_SM4);
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}
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// sve2-aes was historically associated with both FEAT_SVE2 and FEAT_SVE_AES,
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// the latter is now associated with sve-aes and sve2-aes has become shorthand
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// for +sve2+sve-aes. For backwards compatibility, when we disable sve2-aes we
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// must also disable sve-aes.
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if (E == AEK_SVE2AES)
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disable(AEK_SVEAES);
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// sve2-sm4 was historically associated with both FEAT_SVE2 and
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// FEAT_SVE_SM4, the latter is now associated with sve-sm4 and sve2-sm4 has
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// become shorthand for +sve2+sve-sm4. For backwards compatibility, when we
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// disable sve2-sm4 we must also disable sve-sm4.
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if (E == AEK_SVE2SM4)
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disable(AEK_SVESM4);
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// sve2-sha3 was historically associated with both FEAT_SVE2 and
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// FEAT_SVE_SHA3, the latter is now associated with sve-sha3 and sve2-sha3 has
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// become shorthand for +sve2+sve-sha3. For backwards compatibility, when we
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// disable sve2-sha3 we must also disable sve-sha3.
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if (E == AEK_SVE2SHA3)
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disable(AEK_SVESHA3);
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if (E == AEK_SVE2BITPERM){
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disable(AEK_SVEBITPERM);
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disable(AEK_SVE2);
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}
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if (!Enabled.test(E))
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return;
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LLVM_DEBUG(llvm::dbgs() << "Disable " << lookupExtensionByID(E).UserVisibleName << "\n");
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Touched.set(E);
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Enabled.reset(E);
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// Recursively disable all features that depends on this one.
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for (auto Dep : ExtensionDependencies)
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if (E == Dep.Earlier)
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disable(Dep.Later);
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}
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void AArch64::ExtensionSet::addCPUDefaults(const CpuInfo &CPU) {
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LLVM_DEBUG(llvm::dbgs() << "addCPUDefaults(" << CPU.Name << ")\n");
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BaseArch = &CPU.Arch;
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AArch64::ExtensionBitset CPUExtensions = CPU.getImpliedExtensions();
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for (const auto &E : Extensions)
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if (CPUExtensions.test(E.ID))
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enable(E.ID);
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}
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void AArch64::ExtensionSet::addArchDefaults(const ArchInfo &Arch) {
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LLVM_DEBUG(llvm::dbgs() << "addArchDefaults(" << Arch.Name << ")\n");
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BaseArch = &Arch;
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for (const auto &E : Extensions)
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if (Arch.DefaultExts.test(E.ID))
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enable(E.ID);
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}
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bool AArch64::ExtensionSet::parseModifier(StringRef Modifier,
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const bool AllowNoDashForm) {
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LLVM_DEBUG(llvm::dbgs() << "parseModifier(" << Modifier << ")\n");
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size_t NChars = 0;
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// The "no-feat" form is allowed in the target attribute but nowhere else.
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if (AllowNoDashForm && Modifier.starts_with("no-"))
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NChars = 3;
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else if (Modifier.starts_with("no"))
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NChars = 2;
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bool IsNegated = NChars != 0;
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StringRef ArchExt = Modifier.drop_front(NChars);
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if (auto AE = parseArchExtension(ArchExt)) {
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if (AE->PosTargetFeature.empty() || AE->NegTargetFeature.empty())
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return false;
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if (IsNegated)
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disable(AE->ID);
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else
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enable(AE->ID);
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return true;
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}
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return false;
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}
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void AArch64::ExtensionSet::reconstructFromParsedFeatures(
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const std::vector<std::string> &Features,
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std::vector<std::string> &NonExtensions) {
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assert(Touched.none() && "Bitset already initialized");
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for (auto &F : Features) {
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bool IsNegated = F[0] == '-';
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if (auto AE = targetFeatureToExtension(F)) {
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Touched.set(AE->ID);
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if (IsNegated)
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Enabled.reset(AE->ID);
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else
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Enabled.set(AE->ID);
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continue;
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}
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NonExtensions.push_back(F);
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}
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}
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void AArch64::ExtensionSet::dump() const {
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std::vector<StringRef> Features;
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toLLVMFeatureList(Features);
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for (StringRef F : Features)
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llvm::outs() << F << " ";
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llvm::outs() << "\n";
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}
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const AArch64::ExtensionInfo &
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AArch64::getExtensionByID(AArch64::ArchExtKind ExtID) {
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return lookupExtensionByID(ExtID);
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}
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