vasilito fc7cceaa6b intel: DSB, watermarks, PCH — remaining CRITICAL infrastructure ...

dsb.rs: Display State Buffer for atomic commit batching
  Hardware batch programming via MMIO_TRIGGER
  Non-blocking commit with vblank synchronization
  MMIO write + wait_us + wait_vblank opcodes

watermark.rs: display buffer watermark computation
  Per-generation latency (3.5us Gen12+, 5us older)
  DBUF block count per mode configuration

mod.rs: wired DisplayStateBuffer alongside FBC/DRRS/PSR
  DSB available for glitch-free atomic modeset commits

2026-06-02 06:05:32 +03:00

..

Assets/images

Red Bear OS — microkernel OS in Rust, based on Redox

2026-04-12 19:05:00 +01:00

cache

migrate: finalize source ownership — mini ISO builds and boots

2026-05-30 00:38:25 +03:00

config

Merge bootprocess branch overlay into 0.2.0

2026-05-27 06:47:23 +03:00

docs

intel: fix pre-Gen9 per-gen flags, enable Gen8 PPGTT, expand plan

2026-06-01 22:59:09 +03:00

recipes

intel: DSB, watermarks, PCH — remaining CRITICAL infrastructure

2026-06-02 06:05:32 +03:00

scripts

fix: complete m4 recipe - fix_types.h with all sys types, typedef stripping

2026-06-01 21:03:27 +03:00

sources

fix: bits_pthread cbindgen needs stddef.h for size_t type

2026-06-01 17:00:53 +03:00

AGENTS.md

docs: rewrite local/AGENTS.md for source ownership model

2026-05-29 22:54:38 +03:00