The MSR library was missing the HWP (Hardware P-states / Intel Speed
Shift) MSR set. Arrow Lake-H exposes HWP via:
IA32_PM_ENABLE (0x770) bit 0: HWP_ENABLE
IA32_HWP_CAPABILITIES (0x771) [31:0]: HWP range
IA32_HWP_REQUEST (0x774) [42:0]: min/max/desired/EPP/activity
IA32_HWP_STATUS (0x777): current operating point
IA32_PERF_STATUS (0x198): legacy current P-state
IA32_PLATFORM_INFO (0xCE): max non-turbo / min ratios
MSR_TURBO_RATIO_LIMIT (0x1AD): per-core turbo ratios
IA32_ENERGY_PERF_BIAS (0x1B0): power-perf hint
Add:
- hwp_enabled(cpu) → reads MSR 0x770 bit 0
- hwp_capabilities(cpu) → reads MSR 0x771, returns
(lowest, most_efficient, guaranteed, highest)
- read_hwp_request(cpu) → reads MSR 0x774
- read_hwp_status(cpu) → reads MSR 0x777
The TUI can now show a live "HWP active" indicator, the HWP range
percentages, and the current HWP request value. The HWP range
is computed once at startup; updates need only a re-read of
MSR 0x774 (8 bytes, ~microseconds).
The phase-G.1 kernel MSR scheme (commit 8cd4f69) provides the
in-memory storage for these reads. On real hardware, the kernel
will write the actual MSR values; on QEMU they default to zero
which makes the TUI display "HWP inactive" without erroring.
Red Bear OS
88555c342d