vasilito
7686729069
Extract protocol-agnostic FenceTimeline from Intel to shared src/drivers/fence.rs — atomic-based fence tracking suitable for Intel, VIRGL, and AMD drivers. Extract protocol-agnostic SyncobjManager from Intel to shared src/drivers/syncobj.rs — syncobj create/destroy/signal/reset/ wait/query and sync_file fd export/import. Wire both into VirtioDriver: - Add FenceTimeline + SyncobjManager fields - Implement all 5 GpuDriver syncobj trait methods (create, destroy, wait, export_fd, import_fd) - Track fence seqnos in virgl_submit_3d (allocate before submit, signal after completion) Intel fence.rs and syncobj.rs converted to thin re-export modules pointing at shared sources — no behavioral change for Intel driver. This gives Mesa VIRGL userspace the standard DRM syncobj API for GPU/compositor synchronization.
37 lines
1004 B
Python
Executable File
37 lines
1004 B
Python
Executable File
#!/usr/bin/env python
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import time
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import sys
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time = time.gmtime()
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print("/* This file was generated by mkhelp.py from less.hlp at "\
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"%d:%02d GMT on %d/%d/%d */\n" %
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(time.tm_hour, time.tm_min, time.tm_year, time.tm_mon, time.tm_mday))
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print("#include \"less.h\"")
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print("constant char helpdata[] = {")
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ch = 0
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while True:
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prevch = ch
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ch = sys.stdin.read(1)
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if ch == '':
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break
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if (ch == "'"):
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print("'\\'',", end='')
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elif (ch == "\\"):
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print("'\\\\',", end='')
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elif (ch == "\b"):
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print ("'\\b',", end='')
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elif (ch == "\t"):
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print ("'\\t',", end='')
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elif (ch == "\n"):
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if prevch != "\r": print("'\\n',")
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elif (ch == "\r"):
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if prevch != "\n": print("'\\n',")
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else:
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if ((ord(ch) >= ord(' ')) and (ord(ch) < 0x7f)):
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print(f"'{ch}',", end='')
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else:
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print("0x%02x," % ord(ch), end='')
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print(" '\\0' };")
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print("constant int size_helpdata = sizeof(helpdata) - 1;")
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