7686729069
Extract protocol-agnostic FenceTimeline from Intel to shared src/drivers/fence.rs — atomic-based fence tracking suitable for Intel, VIRGL, and AMD drivers. Extract protocol-agnostic SyncobjManager from Intel to shared src/drivers/syncobj.rs — syncobj create/destroy/signal/reset/ wait/query and sync_file fd export/import. Wire both into VirtioDriver: - Add FenceTimeline + SyncobjManager fields - Implement all 5 GpuDriver syncobj trait methods (create, destroy, wait, export_fd, import_fd) - Track fence seqnos in virgl_submit_3d (allocate before submit, signal after completion) Intel fence.rs and syncobj.rs converted to thin re-export modules pointing at shared sources — no behavioral change for Intel driver. This gives Mesa VIRGL userspace the standard DRM syncobj API for GPU/compositor synchronization.
23 lines
742 B
Plaintext
23 lines
742 B
Plaintext
/* Generated by "./mkutable -f2 Cf -- unicode/UnicodeData.txt" on Mon Nov 14 18:19:23 PST 2022 */
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{ 0x00ad, 0x00ad }, /* Cf */
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{ 0x0600, 0x0605 }, /* Cf */
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{ 0x061c, 0x061c }, /* Cf */
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{ 0x06dd, 0x06dd }, /* Cf */
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{ 0x070f, 0x070f }, /* Cf */
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{ 0x0890, 0x0891 }, /* Cf */
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{ 0x08e2, 0x08e2 }, /* Cf */
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{ 0x180e, 0x180e }, /* Cf */
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{ 0x200b, 0x200f }, /* Cf */
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{ 0x202a, 0x202e }, /* Cf */
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{ 0x2060, 0x2064 }, /* Cf */
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{ 0x2066, 0x206f }, /* Cf */
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{ 0xfeff, 0xfeff }, /* Cf */
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{ 0xfff9, 0xfffb }, /* Cf */
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{ 0x110bd, 0x110bd }, /* Cf */
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{ 0x110cd, 0x110cd }, /* Cf */
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{ 0x13430, 0x1343f }, /* Cf */
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{ 0x1bca0, 0x1bca3 }, /* Cf */
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{ 0x1d173, 0x1d17a }, /* Cf */
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{ 0xe0001, 0xe0001 }, /* Cf */
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{ 0xe0020, 0xe007f }, /* Cf */
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