7686729069
Extract protocol-agnostic FenceTimeline from Intel to shared src/drivers/fence.rs — atomic-based fence tracking suitable for Intel, VIRGL, and AMD drivers. Extract protocol-agnostic SyncobjManager from Intel to shared src/drivers/syncobj.rs — syncobj create/destroy/signal/reset/ wait/query and sync_file fd export/import. Wire both into VirtioDriver: - Add FenceTimeline + SyncobjManager fields - Implement all 5 GpuDriver syncobj trait methods (create, destroy, wait, export_fd, import_fd) - Track fence seqnos in virgl_submit_3d (allocate before submit, signal after completion) Intel fence.rs and syncobj.rs converted to thin re-export modules pointing at shared sources — no behavioral change for Intel driver. This gives Mesa VIRGL userspace the standard DRM syncobj API for GPU/compositor synchronization.
50 lines
1.1 KiB
C
50 lines
1.1 KiB
C
/* Test for memory/CPU leak in regcomp. */
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#include <config.h>
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#include <sys/types.h>
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#include <sys/time.h>
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#include <sys/resource.h>
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#include <regex.h>
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#include <stdio.h>
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#include <stdlib.h>
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#define TEST_DATA_LIMIT (32 << 20)
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int
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main ()
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{
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#ifdef RLIMIT_DATA
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regex_t re;
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int reerr;
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/* Try to avoid eating all memory if a test leaks. */
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struct rlimit data_limit;
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if (getrlimit (RLIMIT_DATA, &data_limit) == 0)
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{
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if ((rlim_t) TEST_DATA_LIMIT > data_limit.rlim_max)
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data_limit.rlim_cur = data_limit.rlim_max;
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else if (data_limit.rlim_cur > (rlim_t) TEST_DATA_LIMIT)
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data_limit.rlim_cur = (rlim_t) TEST_DATA_LIMIT;
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if (setrlimit (RLIMIT_DATA, &data_limit) < 0)
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perror ("setrlimit: RLIMIT_DATA");
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}
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else
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perror ("getrlimit: RLIMIT_DATA");
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reerr = regcomp (&re, "^6?3?[25]?5?[14]*[25]*[69]*+[58]*87?4?$",
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REG_EXTENDED | REG_NOSUB);
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if (reerr != 0)
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{
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char buf[100];
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regerror (reerr, &re, buf, sizeof buf);
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printf ("regerror %s\n", buf);
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return 1;
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}
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return 0;
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#else
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return 77;
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#endif
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}
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