vasilito
7686729069
Extract protocol-agnostic FenceTimeline from Intel to shared src/drivers/fence.rs — atomic-based fence tracking suitable for Intel, VIRGL, and AMD drivers. Extract protocol-agnostic SyncobjManager from Intel to shared src/drivers/syncobj.rs — syncobj create/destroy/signal/reset/ wait/query and sync_file fd export/import. Wire both into VirtioDriver: - Add FenceTimeline + SyncobjManager fields - Implement all 5 GpuDriver syncobj trait methods (create, destroy, wait, export_fd, import_fd) - Track fence seqnos in virgl_submit_3d (allocate before submit, signal after completion) Intel fence.rs and syncobj.rs converted to thin re-export modules pointing at shared sources — no behavioral change for Intel driver. This gives Mesa VIRGL userspace the standard DRM syncobj API for GPU/compositor synchronization.
27 lines
686 B
Plaintext
27 lines
686 B
Plaintext
## Syntax highlighting for XML files.
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syntax xml "\.([jrsx]html?|jnlp|mml|pom|rng|sgml?|svg|w[as]dl|wsdd|xjb|xml|xs(d|lt?)|xul)$"
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header "<\?xml.*version=.*\?>"
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magic "(XML|SGML) (sub)?document"
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comment "<!--|-->"
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# First the entire content of the tag (for the attributes):
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color green start="<" end=">"
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# The angled brackets and the name of the tag:
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color cyan "<[^> ]+|/?>"
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# The strings inside the tag:
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color magenta ""[^"]*""
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# Prolog stuff:
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color #888 "<\?.+\?>|<!DOCTYPE[^>]+>|\]>"
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color #888 start="<!DOCTYPE[^>]*$" end="^[^<]*>"
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# Comments:
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color yellow start="<!--" end="-->"
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# Entities (custom and predefined):
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color pink "&[^; ]+;"
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color red "&(amp|apos|gt|lt|quot);"
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