vasilito
7686729069
Extract protocol-agnostic FenceTimeline from Intel to shared src/drivers/fence.rs — atomic-based fence tracking suitable for Intel, VIRGL, and AMD drivers. Extract protocol-agnostic SyncobjManager from Intel to shared src/drivers/syncobj.rs — syncobj create/destroy/signal/reset/ wait/query and sync_file fd export/import. Wire both into VirtioDriver: - Add FenceTimeline + SyncobjManager fields - Implement all 5 GpuDriver syncobj trait methods (create, destroy, wait, export_fd, import_fd) - Track fence seqnos in virgl_submit_3d (allocate before submit, signal after completion) Intel fence.rs and syncobj.rs converted to thin re-export modules pointing at shared sources — no behavioral change for Intel driver. This gives Mesa VIRGL userspace the standard DRM syncobj API for GPU/compositor synchronization.
13 lines
451 B
Plaintext
13 lines
451 B
Plaintext
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#------------------------------------------------------------------------------
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# $File: zilog,v 1.7 2009/09/19 16:28:13 christos Exp $
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# zilog: file(1) magic for Zilog Z8000.
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#
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# Was it big-endian or little-endian? My Product Specification doesn't
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# say.
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#
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0 long 0xe807 object file (z8000 a.out)
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0 long 0xe808 pure object file (z8000 a.out)
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0 long 0xe809 separate object file (z8000 a.out)
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0 long 0xe805 overlay object file (z8000 a.out)
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