vasilito
7686729069
Extract protocol-agnostic FenceTimeline from Intel to shared src/drivers/fence.rs — atomic-based fence tracking suitable for Intel, VIRGL, and AMD drivers. Extract protocol-agnostic SyncobjManager from Intel to shared src/drivers/syncobj.rs — syncobj create/destroy/signal/reset/ wait/query and sync_file fd export/import. Wire both into VirtioDriver: - Add FenceTimeline + SyncobjManager fields - Implement all 5 GpuDriver syncobj trait methods (create, destroy, wait, export_fd, import_fd) - Track fence seqnos in virgl_submit_3d (allocate before submit, signal after completion) Intel fence.rs and syncobj.rs converted to thin re-export modules pointing at shared sources — no behavioral change for Intel driver. This gives Mesa VIRGL userspace the standard DRM syncobj API for GPU/compositor synchronization.
25 lines
899 B
Plaintext
25 lines
899 B
Plaintext
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#------------------------------------------------------------------------------
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# $File: sccs,v 1.8 2020/06/20 21:32:52 christos Exp $
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# sccs: file(1) magic for SCCS archives
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#
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# SCCS v4 archive structure:
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# \001h01207
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# \001s 00276/00000/00000
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# \001d D 1.1 87/09/23 08:09:20 ian 1 0
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# \001c date and time created 87/09/23 08:09:20 by ian
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# \001e
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# \001u
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# \001U
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# ... etc.
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# Now '\001h' happens to be the same as the 3B20's a.out magic number (0550).
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# *Sigh*. And these both came from various parts of the USG.
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# Maybe we should just switch everybody from SCCS to RCS!
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# Further, you can't just say '\001h0', because the five-digit number
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# is a checksum that could (presumably) have any leading digit,
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# Fortunately we have regular expression matching:
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0 string \001h
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>2 regex [0-9][0-9][0-9][0-9][0-9]$
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>>8 string \001s\040 SCCS v4 archive data
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>2 string V6,sum= SCCS v6 archive data
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