620 lines
68 KiB
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620 lines
68 KiB
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<span style="color:#7a7c7d">--------------------------------------------------------------------------------</span>
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<span style="color:#7a7c7d">-- light52_muldiv.vhdl -- Simple multiplier/divider module.</span>
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<span style="color:#7a7c7d">--------------------------------------------------------------------------------</span>
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<span style="color:#7a7c7d">-- The 8051 mul and div instructions are both unsigned and operands are 8 bit.</span>
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<span style="color:#7a7c7d">--</span>
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<span style="color:#7a7c7d">-- This module implements the division as a sequential state machine which takes</span>
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<span style="color:#7a7c7d">-- 8 cycles to complete. </span>
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<span style="color:#7a7c7d">-- The multiplier can be implemented as sequential or as combinational, in which</span>
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<span style="color:#7a7c7d">-- case it will use a DSP block in those architectures that support it.</span>
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<span style="color:#7a7c7d">-- No attempt has been made to make this module generic or reusable.</span>
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<span style="color:#7a7c7d">--</span>
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<span style="color:#7a7c7d">-- If you want a combinational multiplier but don't want to waste a DSP block </span>
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<span style="color:#7a7c7d">-- in this module, you need to modify this file adding whatever synthesis </span>
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<span style="color:#7a7c7d">-- pragmas your tool of choice needs.</span>
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<span style="color:#7a7c7d">--</span>
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<span style="color:#7a7c7d">-- Note that unlike the division state machine, the combinational product logic</span>
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<span style="color:#7a7c7d">-- is always operating: when SEQUENTIAL_MULTIPLIER=true, prod_out equals </span>
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<span style="color:#7a7c7d">-- data_a * data_b with a latency of 1 clock cycle, and mul_ready is hardwired</span>
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<span style="color:#7a7c7d">-- to '1'.</span>
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<span style="color:#7a7c7d">--</span>
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<span style="color:#7a7c7d">-- </span><span style="color:#ca9219;background-color:#451e1a;font-weight:bold">FIXME</span><span style="color:#7a7c7d"> explain division algorithm.</span>
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<span style="color:#7a7c7d">--------------------------------------------------------------------------------</span>
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<span style="color:#7a7c7d">-- GENERICS:</span>
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<span style="color:#7a7c7d">-- </span>
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<span style="color:#7a7c7d">-- SEQUENTIAL_MULTIPLIER -- Sequential vs. combinational multiplier.</span>
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<span style="color:#7a7c7d">-- When true, a sequential implementation will be used for the multiplier, </span>
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<span style="color:#7a7c7d">-- which will usually save a lot of logic or a dedicated multiplier.</span>
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<span style="color:#7a7c7d">-- When false, a combinational registered multiplier will be used.</span>
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<span style="color:#7a7c7d">--</span>
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<span style="color:#7a7c7d">--------------------------------------------------------------------------------</span>
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<span style="color:#7a7c7d">-- INTERFACE SIGNALS:</span>
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<span style="color:#7a7c7d">--</span>
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<span style="color:#7a7c7d">-- clk : Clock, active rising edge.</span>
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<span style="color:#7a7c7d">-- reset : Synchronous reset. Clears only the control registers not</span>
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<span style="color:#7a7c7d">-- visible to the programmer -- not the output registers.</span>
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<span style="color:#7a7c7d">-- </span>
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<span style="color:#7a7c7d">-- data_a : Numerator input, should be connected to the ACC register.</span>
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<span style="color:#7a7c7d">-- data_b : Denominator input, should be connected to the B register.</span>
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<span style="color:#7a7c7d">-- start : Assert for 1 cycle to start the division state machine</span>
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<span style="color:#7a7c7d">-- (and the product if SEQUENTIAL_MULTIPLIER=true);</span>
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<span style="color:#7a7c7d">-- </span>
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<span style="color:#7a7c7d">-- prod_out : Product output, valid only when mul_ready='1'.</span>
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<span style="color:#7a7c7d">-- quot_out : Quotient output, valid only when div_ready='1'.</span>
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<span style="color:#7a7c7d">-- rem_out : Remainder output, valid only when div_ready='1'.</span>
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<span style="color:#7a7c7d">-- div_ov_out : Division overflow flag, valid only when div_ready='1'.</span>
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<span style="color:#7a7c7d">-- mul_ov_out : Product overflow flag, valid only when mul_ready='1'.</span>
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<span style="color:#7a7c7d">-- </span>
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<span style="color:#7a7c7d">-- mul_ready : Asserted permanently if SEQUENTIAL_MULTIPLIER=false.</span>
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<span style="color:#7a7c7d">-- div_ready : Deasserted the cycle after start is asserted.</span>
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<span style="color:#7a7c7d">-- Asserted when the division has completed.</span>
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<span style="color:#7a7c7d">--</span>
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<span style="color:#7a7c7d">--------------------------------------------------------------------------------</span>
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<span style="color:#7a7c7d">-- Copyright (C) 2012 Jose A. Ruiz</span>
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<span style="color:#7a7c7d">-- </span>
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<span style="color:#7a7c7d">-- This source file may be used and distributed without </span>
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<span style="color:#7a7c7d">-- restriction provided that this copyright statement is not </span>
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<span style="color:#7a7c7d">-- removed from the file and that any derivative work contains </span>
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<span style="color:#7a7c7d">-- the original copyright notice and the associated disclaimer. </span>
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<span style="color:#7a7c7d">-- </span>
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<span style="color:#7a7c7d">-- This source file is free software; you can redistribute it </span>
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<span style="color:#7a7c7d">-- and/or modify it under the terms of the GNU Lesser General </span>
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<span style="color:#7a7c7d">-- Public License as published by the Free Software Foundation; </span>
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<span style="color:#7a7c7d">-- either version 2.1 of the License, or (at your option) any </span>
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<span style="color:#7a7c7d">-- later version. </span>
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<span style="color:#7a7c7d">-- </span>
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<span style="color:#7a7c7d">-- This source is distributed in the hope that it will be </span>
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<span style="color:#7a7c7d">-- useful, but WITHOUT ANY WARRANTY; without even the implied </span>
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<span style="color:#7a7c7d">-- warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR </span>
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<span style="color:#7a7c7d">-- PURPOSE. See the GNU Lesser General Public License for more </span>
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<span style="color:#7a7c7d">-- details. </span>
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<span style="color:#7a7c7d">-- </span>
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<span style="color:#7a7c7d">-- You should have received a copy of the GNU Lesser General </span>
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<span style="color:#7a7c7d">-- Public License along with this source; if not, download it </span>
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<span style="color:#7a7c7d">-- from http://www.opencores.org/lgpl.shtml</span>
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<span style="color:#7a7c7d">--------------------------------------------------------------------------------</span>
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<span style="font-weight:bold">library</span> ieee;
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<span style="font-weight:bold">use</span> ieee<span style="color:#27ae60">.</span>std_logic_1164<span style="color:#27ae60">.</span><span style="font-weight:bold">all</span>;
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<span style="font-weight:bold">use</span> ieee<span style="color:#27ae60">.</span>numeric_std<span style="color:#27ae60">.</span><span style="font-weight:bold">all</span>;
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<span style="font-weight:bold">use</span> work<span style="color:#27ae60">.</span>light52_pkg<span style="color:#27ae60">.</span><span style="font-weight:bold">all</span>;
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<span style="font-weight:bold">use</span> work<span style="color:#27ae60">.</span>light52_ucode_pkg<span style="color:#27ae60">.</span><span style="font-weight:bold">all</span>;
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<span style="color:#fdbc4b;font-weight:bold">entity</span> <span style="color:#f67400;font-weight:bold">light52_muldiv</span> <span style="font-weight:bold">is</span>
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<span style="color:#fdbc4b;font-weight:bold">generic</span> (
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SEQUENTIAL_MULTIPLIER <span style="color:#27ae60">:</span> <span style="color:#2980b9">boolean</span> <span style="color:#27ae60">:=</span> <span style="font-weight:bold">false</span>
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);
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<span style="color:#fdbc4b;font-weight:bold">port</span>(
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clk <span style="color:#27ae60">:</span> <span style="font-weight:bold">in</span> <span style="color:#2980b9">std_logic</span>;
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reset <span style="color:#27ae60">:</span> <span style="font-weight:bold">in</span> <span style="color:#2980b9">std_logic</span>;
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data_a <span style="color:#27ae60">:</span> <span style="font-weight:bold">in</span> t_byte;
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data_b <span style="color:#27ae60">:</span> <span style="font-weight:bold">in</span> t_byte;
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start <span style="color:#27ae60">:</span> <span style="font-weight:bold">in</span> <span style="color:#2980b9">std_logic</span>;
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prod_out <span style="color:#27ae60">:</span> <span style="font-weight:bold">out</span> t_word;
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quot_out <span style="color:#27ae60">:</span> <span style="font-weight:bold">out</span> t_byte;
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rem_out <span style="color:#27ae60">:</span> <span style="font-weight:bold">out</span> t_byte;
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div_ov_out <span style="color:#27ae60">:</span> <span style="font-weight:bold">out</span> <span style="color:#2980b9">std_logic</span>;
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mul_ov_out <span style="color:#27ae60">:</span> <span style="font-weight:bold">out</span> <span style="color:#2980b9">std_logic</span>;
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mul_ready <span style="color:#27ae60">:</span> <span style="font-weight:bold">out</span> <span style="color:#2980b9">std_logic</span>;
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div_ready <span style="color:#27ae60">:</span> <span style="font-weight:bold">out</span> <span style="color:#2980b9">std_logic</span>
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);
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<span style="color:#fdbc4b;font-weight:bold">end entity light52_muldiv;</span>
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<span style="color:#fdbc4b;font-weight:bold">architecture</span> <span style="color:#f67400;font-weight:bold">sequential</span> <span style="font-weight:bold">of</span> <span style="color:#8e44ad">light52_muldiv</span> <span style="font-weight:bold">is</span>
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<span style="color:#27ae60">signal</span> bit_ctr <span style="color:#27ae60">:</span> <span style="color:#2980b9">integer</span> <span style="font-weight:bold">range</span> <span style="color:#f67400">0</span> <span style="color:#27ae60">to</span> <span style="color:#f67400">8</span>;
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<span style="color:#27ae60">signal</span> b_shift_reg <span style="color:#27ae60">:</span> t_word;
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<span style="color:#27ae60">signal</span> den_ge_256 <span style="color:#27ae60">:</span> <span style="color:#2980b9">std_logic</span>;
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<span style="color:#27ae60">signal</span> num_ge_den <span style="color:#27ae60">:</span> <span style="color:#2980b9">std_logic</span>;
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<span style="color:#27ae60">signal</span> sub_num <span style="color:#27ae60">:</span> <span style="color:#2980b9">std_logic</span>;
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<span style="color:#27ae60">signal</span> denominator <span style="color:#27ae60">:</span> t_byte;
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<span style="color:#27ae60">signal</span> rem_reg <span style="color:#27ae60">:</span> t_byte;
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<span style="color:#27ae60">signal</span> quot_reg <span style="color:#27ae60">:</span> t_byte;
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<span style="color:#27ae60">signal</span> prod_reg <span style="color:#27ae60">:</span> t_word;
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<span style="color:#27ae60">signal</span> ready <span style="color:#27ae60">:</span> <span style="color:#2980b9">std_logic</span>;
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<span style="color:#27ae60">signal</span> load_regs <span style="color:#27ae60">:</span> <span style="color:#2980b9">std_logic</span>;
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<span style="color:#fdbc4b;font-weight:bold">begin</span>
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<span style="color:#7a7c7d">-- Control logic ---------------------------------------------------------------</span>
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<span style="color:#f67400;font-weight:bold">control_counter</span><span style="color:#27ae60">:</span> <span style="color:#3daee9;font-weight:bold">process</span>(clk)
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<span style="font-weight:bold">alias</span> sig <span style="font-weight:bold">is</span> <span style="color:#27ae60"><<</span><span style="color:#27ae60">signal</span> g_test(<span style="color:#f67400">0</span>)<span style="color:#27ae60">.</span>i_test<span style="color:#27ae60">.</span>sig <span style="color:#27ae60">:</span> <span style="color:#2980b9">std_logic</span><span style="color:#27ae60">>></span>;
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<span style="color:#3daee9;font-weight:bold">begin</span>
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<span style="color:#fdbc4b;font-weight:bold">if</span> clk<span style="color:#f67400">'event</span> <span style="font-weight:bold">and</span> clk<span style="color:#27ae60">=</span><span style="color:#f67400">'1'</span> <span style="color:#fdbc4b;font-weight:bold">then</span>
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<span style="color:#fdbc4b;font-weight:bold">if</span> reset<span style="color:#27ae60">=</span><span style="color:#f67400">'1'</span> <span style="color:#fdbc4b;font-weight:bold">then</span>
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bit_ctr <span style="color:#27ae60"><=</span> <span style="color:#f67400">8</span>;
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<span style="color:#fdbc4b;font-weight:bold">else</span>
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<span style="color:#fdbc4b;font-weight:bold">if</span> load_regs<span style="color:#27ae60">=</span><span style="color:#f67400">'1'</span> <span style="color:#fdbc4b;font-weight:bold">then</span>
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bit_ctr <span style="color:#27ae60"><=</span> <span style="color:#f67400">0</span>;
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<span style="color:#fdbc4b;font-weight:bold">elsif</span> bit_ctr <span style="color:#27ae60">/=</span> <span style="color:#f67400">8</span> <span style="color:#fdbc4b;font-weight:bold">then</span>
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bit_ctr <span style="color:#27ae60"><=</span> bit_ctr <span style="color:#27ae60">+</span> <span style="color:#f67400">1</span>;
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<span style="color:#fdbc4b;font-weight:bold">end if;</span>
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<span style="color:#fdbc4b;font-weight:bold">end if;</span>
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<span style="color:#fdbc4b;font-weight:bold">end if;</span>
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<span style="color:#3daee9;font-weight:bold">end process control_counter;</span>
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<span style="color:#7a7c7d">-- Internal signal ready is asserted after 8 cycles.</span>
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<span style="color:#7a7c7d">-- The sequential multiplier will use this signal too, IF it takes 8 cycles.</span>
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ready <span style="color:#27ae60"><=</span> <span style="color:#f67400">'1'</span> <span style="font-weight:bold">when</span> bit_ctr <span style="color:#27ae60">>=</span> <span style="color:#f67400">8</span> <span style="font-weight:bold">else</span> <span style="color:#f67400">'0'</span>;
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<span style="color:#7a7c7d">---- Divider logic -------------------------------------------------------------</span>
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<span style="color:#7a7c7d">-- What we do is a simple base-2 'shift-and-subtract' algorithm that takes</span>
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<span style="color:#7a7c7d">-- 8 cycles to complete. We can get away with this because we deal with unsigned</span>
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<span style="color:#7a7c7d">-- numbers only.</span>
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<span style="color:#f67400;font-weight:bold">divider_registers</span><span style="color:#27ae60">:</span> <span style="color:#3daee9;font-weight:bold">process</span>(clk)
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<span style="color:#3daee9;font-weight:bold">begin</span>
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<span style="color:#fdbc4b;font-weight:bold">if</span> clk<span style="color:#f67400">'event</span> <span style="font-weight:bold">and</span> clk<span style="color:#27ae60">=</span><span style="color:#f67400">'1'</span> <span style="color:#fdbc4b;font-weight:bold">then</span>
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<span style="color:#7a7c7d">-- denominator shift register</span>
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<span style="color:#fdbc4b;font-weight:bold">if</span> load_regs<span style="color:#27ae60">=</span><span style="color:#f67400">'1'</span> <span style="color:#fdbc4b;font-weight:bold">then</span>
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b_shift_reg <span style="color:#27ae60"><=</span> <span style="color:#f44f4f">"0"</span> <span style="color:#27ae60">&</span> data_b <span style="color:#27ae60">&</span> <span style="color:#f44f4f">"0000000"</span>;
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<span style="color:#7a7c7d">-- Division overflow can be determined upon loading B reg data.</span>
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<span style="color:#7a7c7d">-- OV will be raised only on div-by-zero.</span>
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<span style="color:#fdbc4b;font-weight:bold">if</span> data_b<span style="color:#27ae60">=</span>X<span style="color:#f44f4f">"00"</span> <span style="color:#fdbc4b;font-weight:bold">then</span>
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div_ov_out <span style="color:#27ae60"><=</span> <span style="color:#f67400">'1'</span>;
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<span style="color:#fdbc4b;font-weight:bold">else</span>
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div_ov_out <span style="color:#27ae60"><=</span> <span style="color:#f67400">'0'</span>;
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<span style="color:#fdbc4b;font-weight:bold">end if;</span>
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<span style="color:#fdbc4b;font-weight:bold">else</span>
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b_shift_reg <span style="color:#27ae60"><=</span> <span style="color:#f44f4f">"0"</span> <span style="color:#27ae60">&</span> b_shift_reg(b_shift_reg<span style="color:#f67400">'high</span> <span style="color:#27ae60">downto</span> <span style="color:#f67400">1</span>);
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<span style="color:#fdbc4b;font-weight:bold">end if;</span>
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<span style="color:#7a7c7d">-- numerator register</span>
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<span style="color:#fdbc4b;font-weight:bold">if</span> load_regs<span style="color:#27ae60">=</span><span style="color:#f67400">'1'</span> <span style="color:#fdbc4b;font-weight:bold">then</span>
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rem_reg <span style="color:#27ae60"><=</span> data_a;
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<span style="color:#fdbc4b;font-weight:bold">elsif</span> bit_ctr<span style="color:#27ae60">/=</span><span style="color:#f67400">8</span> <span style="font-weight:bold">and</span> sub_num<span style="color:#27ae60">=</span><span style="color:#f67400">'1'</span> <span style="color:#fdbc4b;font-weight:bold">then</span>
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rem_reg <span style="color:#27ae60"><=</span> rem_reg <span style="color:#27ae60">-</span> denominator;
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<span style="color:#fdbc4b;font-weight:bold">end if;</span>
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<span style="color:#7a7c7d">--- quotient register</span>
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<span style="color:#fdbc4b;font-weight:bold">if</span> load_regs<span style="color:#27ae60">=</span><span style="color:#f67400">'1'</span> <span style="color:#fdbc4b;font-weight:bold">then</span>
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quot_reg <span style="color:#27ae60"><=</span> (<span style="color:#27ae60">others</span> <span style="color:#27ae60">=></span> <span style="color:#f67400">'0'</span>);
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<span style="color:#fdbc4b;font-weight:bold">elsif</span> bit_ctr<span style="color:#27ae60">/=</span><span style="color:#f67400">8</span> <span style="color:#fdbc4b;font-weight:bold">then</span>
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quot_reg <span style="color:#27ae60"><=</span> quot_reg(quot_reg<span style="color:#f67400">'high-1</span> <span style="color:#27ae60">downto</span> <span style="color:#f67400">0</span>) <span style="color:#27ae60">&</span> sub_num;
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<span style="color:#fdbc4b;font-weight:bold">end if;</span>
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load_regs <span style="color:#27ae60"><=</span> start;
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<span style="color:#fdbc4b;font-weight:bold">end if;</span>
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<span style="color:#3daee9;font-weight:bold">end process divider_registers;</span>
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denominator <span style="color:#27ae60"><=</span> b_shift_reg(<span style="color:#f67400">7</span> <span style="color:#27ae60">downto</span> <span style="color:#f67400">0</span>);
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<span style="color:#7a7c7d">-- The 16-bit comparison between b_shift_reg (denominator) and the zero-extended </span>
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<span style="color:#7a7c7d">-- rem_reg (numerator) can be simplified by splitting it in 2: </span>
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<span style="color:#7a7c7d">-- If the shifted denominator high byte is not zero, it is >=256...</span>
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den_ge_256 <span style="color:#27ae60"><=</span> <span style="color:#f67400">'1'</span> <span style="font-weight:bold">when</span> b_shift_reg(<span style="color:#f67400">15</span> <span style="color:#27ae60">downto</span> <span style="color:#f67400">8</span>) <span style="color:#27ae60">/=</span> X<span style="color:#f44f4f">"00"</span> <span style="font-weight:bold">else</span> <span style="color:#f67400">'0'</span>;
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<span style="color:#7a7c7d">-- ...otherwise we need to compare the low bytes.</span>
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num_ge_den <span style="color:#27ae60"><=</span> <span style="color:#f67400">'1'</span> <span style="font-weight:bold">when</span> rem_reg <span style="color:#27ae60">>=</span> denominator <span style="font-weight:bold">else</span> <span style="color:#f67400">'0'</span>;
|
|
sub_num <span style="color:#27ae60"><=</span> <span style="color:#f67400">'1'</span> <span style="font-weight:bold">when</span> den_ge_256<span style="color:#27ae60">=</span><span style="color:#f67400">'0'</span> <span style="font-weight:bold">and</span> num_ge_den<span style="color:#27ae60">=</span><span style="color:#f67400">'1'</span> <span style="font-weight:bold">else</span> <span style="color:#f67400">'0'</span>;
|
|
|
|
|
|
quot_out <span style="color:#27ae60"><=</span> quot_reg;
|
|
prod_out <span style="color:#27ae60"><=</span> prod_reg;
|
|
rem_out <span style="color:#27ae60"><=</span> rem_reg;
|
|
|
|
div_ready <span style="color:#27ae60"><=</span> ready;
|
|
|
|
<span style="color:#7a7c7d">---- Multiplier logic ----------------------------------------------------------</span>
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|
|
|
<span style="color:#7a7c7d">---- Combinational multiplier -----------------------------</span>
|
|
<span style="color:#f67400;font-weight:bold">multiplier_combinational</span><span style="color:#27ae60">:</span> <span style="color:#fdbc4b;font-weight:bold">if</span> <span style="font-weight:bold">not</span> SEQUENTIAL_MULTIPLIER <span style="color:#fdbc4b;font-weight:bold">generate</span>
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|
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|
<span style="color:#f67400;font-weight:bold">registered_combinational_multiplier</span><span style="color:#27ae60">:</span><span style="color:#3daee9;font-weight:bold">process</span>(clk)
|
|
<span style="color:#3daee9;font-weight:bold">begin</span>
|
|
<span style="color:#fdbc4b;font-weight:bold">if</span> clk<span style="color:#f67400">'event</span> <span style="font-weight:bold">and</span> clk<span style="color:#27ae60">=</span><span style="color:#f67400">'1'</span> <span style="color:#fdbc4b;font-weight:bold">then</span>
|
|
prod_reg <span style="color:#27ae60"><=</span> data_a <span style="color:#27ae60">*</span> data_b; <span style="color:#7a7c7d">-- t_byte is unsigned</span>
|
|
<span style="color:#fdbc4b;font-weight:bold">end if;</span>
|
|
<span style="color:#3daee9;font-weight:bold">end process registered_combinational_multiplier;</span>
|
|
|
|
<span style="color:#7a7c7d">-- The multiplier output is valid in the cycle after the operands are loaded,</span>
|
|
<span style="color:#7a7c7d">-- so by the time MUL is executed it's already done.</span>
|
|
mul_ready <span style="color:#27ae60"><=</span> <span style="color:#f67400">'1'</span>;
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|
|
|
mul_ov_out <span style="color:#27ae60"><=</span> <span style="color:#f67400">'1'</span> <span style="font-weight:bold">when</span> prod_reg(<span style="color:#f67400">15</span> <span style="color:#27ae60">downto</span> <span style="color:#f67400">8</span>)<span style="color:#27ae60">/=</span>X<span style="color:#f44f4f">"00"</span> <span style="font-weight:bold">else</span> <span style="color:#f67400">'0'</span>;
|
|
prod_out <span style="color:#27ae60"><=</span> prod_reg;
|
|
|
|
<span style="color:#fdbc4b;font-weight:bold">end generate multiplier_combinational;</span>
|
|
|
|
<span style="color:#7a7c7d">---- Sequential multiplier --------------------------------</span>
|
|
<span style="color:#f67400;font-weight:bold">multiplier_sequential</span><span style="color:#27ae60">:</span> <span style="color:#fdbc4b;font-weight:bold">if</span> SEQUENTIAL_MULTIPLIER <span style="color:#fdbc4b;font-weight:bold">generate</span>
|
|
|
|
<span style="font-weight:bold">assert</span> <span style="font-weight:bold">false</span>
|
|
<span style="font-weight:bold">report</span> <span style="color:#f44f4f">"Sequential multiplier implementation not done yet."</span><span style="color:#27ae60">&</span>
|
|
<span style="color:#f44f4f">" Use combinational implementation."</span>
|
|
<span style="font-weight:bold">severity</span> <span style="font-weight:bold">failure</span>;
|
|
|
|
<span style="color:#fdbc4b;font-weight:bold">end generate multiplier_sequential;</span>
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|
|
|
<span style="color:#fdbc4b;font-weight:bold">end sequential;</span>
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<span style="font-weight:bold">with</span> Types; <span style="font-weight:bold">use</span> Types;
|
|
<span style="font-weight:bold">with</span> Files_Map;
|
|
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|
<span style="color:#fdbc4b;font-weight:bold">package</span> <span style="color:#f67400;font-weight:bold">fixed_pkg</span> <span style="font-weight:bold">is</span> <span style="font-weight:bold">new</span> <span style="color:#f67400;font-weight:bold">IEEE</span><span style="color:#27ae60">.</span>fixed_generic_pkg
|
|
<span style="font-weight:bold">generic map </span>(
|
|
fixed_overflow_style <span style="color:#27ae60">=></span> IEEE<span style="color:#27ae60">.</span>fixed_float_types<span style="color:#27ae60">.</span>fixed_saturate<span style="color:#27ae60">,</span>
|
|
fixed_guard_bits <span style="color:#27ae60">=></span> <span style="color:#f67400">3</span><span style="color:#27ae60">,</span>
|
|
no_warning <span style="color:#27ae60">=></span> <span style="font-weight:bold">false</span>
|
|
);
|
|
|
|
<span style="color:#fdbc4b;font-weight:bold">package</span> <span style="color:#f67400;font-weight:bold">p</span> <span style="font-weight:bold">is</span>
|
|
<span style="color:#27ae60">type</span> int_ptr <span style="color:#27ae60">is</span> <span style="font-weight:bold">access</span> <span style="color:#2980b9">integer</span>;
|
|
<span style="color:#27ae60">type</span> rec <span style="color:#27ae60">is</span> <span style="font-weight:bold">record</span>
|
|
data <span style="color:#27ae60">:</span> <span style="color:#2980b9">std_logic_vector</span>(<span style="color:#f67400">31</span> <span style="color:#27ae60">downto</span> <span style="color:#f67400">0</span>);
|
|
ack <span style="color:#27ae60">:</span> <span style="color:#2980b9">std_logic</span>;
|
|
value <span style="color:#27ae60">:</span> <span style="color:#2980b9">integer</span>;
|
|
link <span style="color:#27ae60">:</span> rec_ptr;
|
|
<span style="font-weight:bold">end record;</span>
|
|
<span style="color:#27ae60">type</span> int_vec <span style="color:#27ae60">is</span> <span style="font-weight:bold">array</span> (<span style="color:#2980b9">integer</span> <span style="font-weight:bold">range</span> <span style="color:#27ae60"><></span>) <span style="font-weight:bold">of</span> <span style="color:#2980b9">integer</span>;
|
|
<span style="color:#27ae60">type</span> int_vec_ptr <span style="color:#27ae60">is</span> <span style="font-weight:bold">access</span> int_vec;
|
|
<span style="font-weight:bold">procedure</span> <span style="color:#f67400;font-weight:bold">UNIFORM</span>(<span style="color:#27ae60">variable</span> SEED1<span style="color:#27ae60">,</span> SEED2 <span style="color:#27ae60">:</span> <span style="font-weight:bold">inout</span> <span style="color:#2980b9">POSITIVE</span>; <span style="color:#27ae60">variable</span> X <span style="color:#27ae60">:</span> <span style="font-weight:bold">out</span> <span style="color:#2980b9">REAL</span>);
|
|
<span style="color:#27ae60">constant</span> def_arr <span style="color:#27ae60">:</span> t_int_array <span style="color:#27ae60">:=</span> (<span style="color:#f67400">0</span> <span style="color:#27ae60">to</span> <span style="color:#f67400">2</span> <span style="color:#27ae60">=></span> <span style="color:#f67400">10</span>);
|
|
|
|
<span style="color:#7a7c7d">-- type range</span>
|
|
<span style="color:#27ae60">type</span> newInt <span style="color:#27ae60">is</span> <span style="font-weight:bold">range</span> <span style="color:#27ae60">-</span><span style="color:#f67400">4</span> <span style="color:#27ae60">to</span> <span style="color:#f67400">3</span>;
|
|
<span style="color:#27ae60">type</span> CAPACITY <span style="color:#27ae60">is</span> <span style="font-weight:bold">range</span> <span style="color:#f67400">0</span> <span style="color:#27ae60">to</span> <span style="color:#f67400">1</span><span style="color:#f67400">E5</span> <span style="color:#fdbc4b;font-weight:bold">units</span>
|
|
pF;
|
|
nF <span style="color:#27ae60">=</span> <span style="color:#f67400">1000</span> pF;
|
|
<span style="color:#fdbc4b;font-weight:bold">end units;</span>
|
|
|
|
<span style="color:#7a7c7d">-- type protected</span>
|
|
<span style="color:#27ae60">type</span> prot <span style="color:#27ae60">is</span> <span style="font-weight:bold">protected</span>
|
|
<span style="color:#2980b9;font-weight:bold">function</span> <span style="color:#f67400;font-weight:bold">meth</span>(a <span style="color:#27ae60">:</span> int) <span style="color:#fdbc4b;font-weight:bold">return</span> <span style="color:#2980b9">bit</span>;
|
|
<span style="font-weight:bold">end protected;</span>
|
|
|
|
<span style="color:#7a7c7d">-- type protected body</span>
|
|
<span style="color:#27ae60">type</span> prot <span style="color:#27ae60">is</span> <span style="font-weight:bold">protected</span> <span style="font-weight:bold">body</span>
|
|
<span style="color:#27ae60">variable</span> var <span style="color:#27ae60">:</span> <span style="color:#2980b9">positive</span>;
|
|
<span style="color:#27ae60">constant</span> const <span style="color:#27ae60">:</span> <span style="color:#2980b9">boolean</span>;
|
|
|
|
<span style="color:#2980b9;font-weight:bold">function</span> <span style="color:#f67400;font-weight:bold">meth</span>(a <span style="color:#27ae60">:</span> int) <span style="color:#fdbc4b;font-weight:bold">return</span> <span style="color:#2980b9">bit</span> <span style="font-weight:bold">is</span>
|
|
<span style="color:#2980b9;font-weight:bold">begin</span>
|
|
<span style="color:#2980b9;font-weight:bold">end function;</span>
|
|
<span style="font-weight:bold">end protected body;</span>
|
|
|
|
<span style="color:#2980b9;font-weight:bold">function</span> <span style="color:#f67400;font-weight:bold">\?=\</span> (L<span style="color:#27ae60">,</span> R <span style="color:#27ae60">:</span> <span style="color:#2980b9">BOOLEAN</span>) <span style="color:#fdbc4b;font-weight:bold">return</span> <span style="color:#2980b9">BOOLEAN</span>;
|
|
|
|
<span style="color:#fdbc4b;font-weight:bold">end package;</span>
|
|
|
|
<span style="color:#fdbc4b;font-weight:bold">package</span> <span style="color:#fdbc4b;font-weight:bold">body</span> <span style="color:#f67400;font-weight:bold">p</span> <span style="font-weight:bold">is</span>
|
|
<span style="color:#2980b9;font-weight:bold">function</span> <span style="color:#f67400;font-weight:bold">\?=\</span> (L<span style="color:#27ae60">,</span> R <span style="color:#27ae60">:</span> <span style="color:#2980b9">BOOLEAN</span>) <span style="color:#fdbc4b;font-weight:bold">return</span> <span style="color:#2980b9">BOOLEAN</span> <span style="font-weight:bold">is</span>
|
|
<span style="color:#2980b9;font-weight:bold">begin</span>
|
|
<span style="color:#fdbc4b;font-weight:bold">if</span> <span style="font-weight:bold">not</span> (format(format<span style="color:#f67400">'left</span>) <span style="color:#27ae60">=</span> <span style="color:#f67400">'%'</span>) <span style="color:#fdbc4b;font-weight:bold">then</span>
|
|
<span style="font-weight:bold">report</span> <span style="color:#f44f4f">"to_string: Illegal format string """</span> <span style="color:#27ae60">&</span> format <span style="color:#27ae60">&</span> <span style="color:#f67400">'"'</span>
|
|
<span style="font-weight:bold">severity</span> <span style="font-weight:bold">error</span>;
|
|
<span style="color:#fdbc4b;font-weight:bold">return</span> <span style="color:#f44f4f">""</span>;
|
|
<span style="color:#fdbc4b;font-weight:bold">end if;</span>
|
|
<span style="color:#fdbc4b;font-weight:bold">return</span> L <span style="color:#27ae60">=</span> R;
|
|
<span style="color:#2980b9;font-weight:bold">end function \?=\;</span>
|
|
|
|
<span style="font-weight:bold">procedure</span> <span style="color:#f67400;font-weight:bold">test</span> <span style="color:#fdbc4b;font-weight:bold">is</span>
|
|
<span style="color:#27ae60">variable</span> v <span style="color:#27ae60">:</span> int_ptr;
|
|
<span style="color:#27ae60">variable</span> i <span style="color:#27ae60">:</span> <span style="color:#2980b9">integer</span>;
|
|
<span style="font-weight:bold">begin</span>
|
|
v <span style="color:#27ae60">:=</span> <span style="font-weight:bold">null</span>;
|
|
deallocate(v);
|
|
v <span style="color:#27ae60">:=</span> <span style="font-weight:bold">new</span> <span style="color:#2980b9">integer</span>;
|
|
v <span style="color:#27ae60">:=</span> <span style="font-weight:bold">new</span> integer<span style="color:#f67400">'(5)</span>;
|
|
v<span style="color:#27ae60">.</span><span style="font-weight:bold">all</span> <span style="color:#27ae60">:=</span> <span style="color:#f67400">5</span>;
|
|
r<span style="color:#27ae60">.</span><span style="font-weight:bold">all</span><span style="color:#27ae60">.</span>value <span style="color:#27ae60">:=</span> <span style="color:#f67400">1</span>;
|
|
a <span style="color:#27ae60">:=</span> <span style="font-weight:bold">new</span> int_vec(<span style="color:#f67400">1</span> <span style="color:#27ae60">to</span> <span style="color:#f67400">3</span>);
|
|
a<span style="color:#27ae60">.</span><span style="font-weight:bold">all</span>(<span style="color:#f67400">5</span>) <span style="color:#27ae60">:=</span> <span style="color:#f67400">2</span>;
|
|
a(<span style="color:#f67400">1</span> <span style="color:#27ae60">to</span> <span style="color:#f67400">2</span>) <span style="color:#27ae60">:=</span> (<span style="color:#f67400">1</span><span style="color:#27ae60">,</span> <span style="color:#f67400">2</span>);
|
|
s <span style="color:#27ae60">:=</span> <span style="font-weight:bold">new</span> string<span style="color:#f67400">'("")</span>;
|
|
<span style="font-weight:bold">end procedure;</span>
|
|
|
|
<span style="font-weight:bold">procedure</span> <span style="color:#f67400;font-weight:bold">test2</span>(x <span style="color:#27ae60">:</span> <span style="font-weight:bold">inout</span> rec_ptr) <span style="color:#fdbc4b;font-weight:bold">is</span>
|
|
<span style="font-weight:bold">begin</span>
|
|
x<span style="color:#27ae60">.</span>value <span style="color:#27ae60">:=</span> x<span style="color:#27ae60">.</span>value <span style="color:#27ae60">+</span> <span style="color:#f67400">1</span>;
|
|
<span style="font-weight:bold">end procedure;</span>
|
|
|
|
<span style="font-weight:bold">procedure</span> <span style="color:#f67400;font-weight:bold">test3</span> <span style="color:#fdbc4b;font-weight:bold">is</span>
|
|
<span style="color:#27ae60">type</span> a;
|
|
<span style="color:#27ae60">type</span> a <span style="color:#27ae60">is</span> <span style="font-weight:bold">access</span> <span style="color:#2980b9">integer</span>;
|
|
<span style="color:#27ae60">variable</span> v <span style="color:#27ae60">:</span> a;
|
|
<span style="font-weight:bold">begin</span>
|
|
<span style="font-weight:bold">end procedure;</span>
|
|
|
|
<span style="color:#27ae60">type</span> int_ptr_array <span style="color:#27ae60">is</span> <span style="font-weight:bold">array</span> (<span style="color:#2980b9">integer</span> <span style="font-weight:bold">range</span> <span style="color:#27ae60"><></span>) <span style="font-weight:bold">of</span> int_ptr;
|
|
|
|
<span style="font-weight:bold">procedure</span> <span style="color:#f67400;font-weight:bold">tets4</span> <span style="color:#fdbc4b;font-weight:bold">is</span>
|
|
<span style="color:#27ae60">type</span> bvp <span style="color:#27ae60">is</span> <span style="font-weight:bold">access</span> <span style="color:#2980b9">bit_vector</span>;
|
|
<span style="color:#27ae60">variable</span> y <span style="color:#27ae60">:</span> int_ptr(<span style="color:#f67400">1</span> <span style="color:#27ae60">to</span> <span style="color:#f67400">3</span>) <span style="color:#27ae60">:=</span> int_ptr<span style="color:#f67400">'(null)</span>;
|
|
<span style="font-weight:bold">begin</span>
|
|
<span style="font-weight:bold">end procedure;</span>
|
|
|
|
<span style="font-weight:bold">procedure</span> <span style="color:#f67400;font-weight:bold">Restore_Origin</span> (Mark <span style="color:#27ae60">:</span> Instance_Index_Type) <span style="color:#fdbc4b;font-weight:bold">is</span>
|
|
<span style="font-weight:bold">begin</span>
|
|
<span style="color:#fdbc4b;font-weight:bold">for</span> I <span style="font-weight:bold">in</span> reverse Mark <span style="color:#27ae60">+</span> <span style="color:#f67400">1</span> <span style="color:#27ae60">..</span> Prev_Instance_Table<span style="color:#27ae60">.</span>Last <span style="color:#fdbc4b;font-weight:bold">loop</span>
|
|
<span style="font-weight:bold">declare</span>
|
|
El <span style="color:#27ae60">:</span> Instance_Entry_Type renames Prev_Instance_Table<span style="color:#27ae60">.</span>Table (I);
|
|
<span style="font-weight:bold">begin</span>
|
|
Origin_Table<span style="color:#27ae60">.</span>Table (El<span style="color:#27ae60">.</span>N) <span style="color:#27ae60">:=</span> El<span style="color:#27ae60">.</span>Old_Origin;
|
|
<span style="font-weight:bold">end;</span>
|
|
<span style="color:#fdbc4b;font-weight:bold">end loop;</span>
|
|
Prev_Instance_Table<span style="color:#27ae60">.</span>Set_Last (Mark);
|
|
<span style="font-weight:bold">end Restore_Origin;</span>
|
|
|
|
<span style="color:#7a7c7d">-- Instantiate a list. Simply create a new list and instantiate nodes of</span>
|
|
<span style="color:#7a7c7d">-- that list.</span>
|
|
<span style="color:#2980b9;font-weight:bold">function</span> <span style="color:#f67400;font-weight:bold">Instantiate_Iir_List</span> (L <span style="color:#27ae60">:</span> Iir_List; Is_Ref <span style="color:#27ae60">:</span> <span style="color:#2980b9">Boolean</span>)
|
|
<span style="color:#fdbc4b;font-weight:bold">return</span> Iir_List
|
|
<span style="font-weight:bold">is</span>
|
|
Res <span style="color:#27ae60">:</span> Iir_List;
|
|
El <span style="color:#27ae60">:</span> Iir;
|
|
<span style="color:#2980b9;font-weight:bold">begin</span>
|
|
<span style="color:#fdbc4b;font-weight:bold">case</span> to_integer(<span style="color:#2980b9">unsigned</span>(CTRL_REF(x<span style="color:#27ae60">*</span><span style="color:#f67400">4</span><span style="color:#27ae60">+</span><span style="color:#f67400">3</span> <span style="color:#27ae60">downto</span> x<span style="color:#27ae60">*</span><span style="color:#f67400">4</span>))) <span style="font-weight:bold">is</span>
|
|
<span style="color:#fdbc4b;font-weight:bold">when</span> <span style="color:#f67400;font-weight:bold">Null_Iir_List</span>
|
|
<span style="color:#27ae60">|</span> <span style="color:#f67400;font-weight:bold">Iir_List_All</span> <span style="color:#27ae60">=></span>
|
|
<span style="color:#fdbc4b;font-weight:bold">return</span> L;
|
|
<span style="color:#fdbc4b;font-weight:bold">when</span> <span style="font-weight:bold">others</span> <span style="color:#27ae60">=></span>
|
|
It <span style="color:#27ae60">:=</span> List_Iterate (L);
|
|
<span style="color:#fdbc4b;font-weight:bold">while</span> Is_Valid (It) <span style="color:#fdbc4b;font-weight:bold">loop</span>
|
|
El <span style="color:#27ae60">:=</span> Get_Element (It);
|
|
Append_Element (Res<span style="color:#27ae60">,</span> Instantiate_Iir (El<span style="color:#27ae60">,</span> Is_Ref));
|
|
<span style="color:#fdbc4b;font-weight:bold">end loop;</span>
|
|
<span style="color:#fdbc4b;font-weight:bold">for</span> I <span style="font-weight:bold">in</span> Flist_First <span style="color:#27ae60">..</span> Flist_Last (L) <span style="color:#fdbc4b;font-weight:bold">loop</span>
|
|
Set_Nth_Element (Res<span style="color:#27ae60">,</span> I<span style="color:#27ae60">,</span> Instantiate_Iir (El<span style="color:#27ae60">,</span> Is_Ref));
|
|
<span style="color:#fdbc4b;font-weight:bold">end loop;</span>
|
|
<span style="color:#fdbc4b;font-weight:bold">return</span> Res;
|
|
<span style="color:#fdbc4b;font-weight:bold">end case;</span>
|
|
<span style="color:#2980b9;font-weight:bold">end Instantiate_Iir_List;</span>
|
|
<span style="color:#fdbc4b;font-weight:bold">end package body;</span>
|
|
|
|
<span style="color:#7a7c7d">-- Library bar</span>
|
|
<span style="font-weight:bold">context</span> foo<span style="color:#27ae60">.</span>test_context;
|
|
|
|
<span style="font-weight:bold">context</span> <span style="color:#f67400;font-weight:bold">foo</span> <span style="font-weight:bold">is</span>
|
|
<span style="font-weight:bold">context</span> foo<span style="color:#27ae60">.</span>test_context;
|
|
<span style="font-weight:bold">end context foo;</span>
|
|
|
|
<span style="color:#fdbc4b;font-weight:bold">entity</span> <span style="color:#f67400;font-weight:bold">concat</span> <span style="font-weight:bold">is</span>
|
|
<span style="color:#fdbc4b;font-weight:bold">end entity;</span>
|
|
|
|
<span style="color:#fdbc4b;font-weight:bold">entity</span> <span style="color:#f67400;font-weight:bold">foo</span> <span style="font-weight:bold">is</span>
|
|
<span style="color:#fdbc4b;font-weight:bold">port</span> (
|
|
x <span style="color:#27ae60">:</span> <span style="font-weight:bold">in</span> my_int );
|
|
<span style="color:#fdbc4b;font-weight:bold">end entity;</span>
|
|
|
|
<span style="color:#fdbc4b;font-weight:bold">architecture</span> <span style="color:#f67400;font-weight:bold">t</span> <span style="font-weight:bold">of</span> <span style="color:#8e44ad">concat</span> <span style="font-weight:bold">is</span>
|
|
<span style="color:#27ae60">type</span> int_array <span style="color:#27ae60">is</span> <span style="font-weight:bold">array</span> (<span style="color:#2980b9">integer</span> <span style="font-weight:bold">range</span> <span style="color:#27ae60"><></span>) <span style="font-weight:bold">of</span> <span style="color:#2980b9">integer</span>;
|
|
<span style="color:#27ae60">type</span> small <span style="color:#27ae60">is</span> <span style="font-weight:bold">range</span> <span style="color:#f67400">1</span> <span style="color:#27ae60">to</span> <span style="color:#f67400">3</span>;
|
|
|
|
<span style="color:#fdbc4b;font-weight:bold">component</span> <span style="color:#f67400;font-weight:bold">or_entity</span> <span style="font-weight:bold">is</span>
|
|
<span style="color:#fdbc4b;font-weight:bold">port</span>(
|
|
input_1<span style="color:#27ae60">:</span> <span style="font-weight:bold">in</span> <span style="color:#2980b9">std_logic</span>;
|
|
output<span style="color:#27ae60">:</span> <span style="font-weight:bold">out</span> <span style="color:#2980b9">std_logic</span>
|
|
);
|
|
<span style="color:#fdbc4b;font-weight:bold">end component;</span>
|
|
<span style="color:#fdbc4b;font-weight:bold">begin</span>
|
|
<span style="color:#3daee9;font-weight:bold">process</span>
|
|
<span style="color:#27ae60">variable</span> s <span style="color:#27ae60">:</span> <span style="color:#2980b9">string</span>(<span style="color:#f67400">1</span> <span style="color:#27ae60">to</span> <span style="color:#f67400">5</span>);
|
|
<span style="color:#27ae60">variable</span> t <span style="color:#27ae60">:</span> int_array(<span style="color:#f67400">1</span> <span style="color:#27ae60">to</span> <span style="color:#f67400">2</span>);
|
|
<span style="color:#27ae60">variable</span> c <span style="color:#27ae60">:</span> <span style="color:#2980b9">bit_vector</span>(<span style="color:#f67400">1</span> <span style="color:#27ae60">to</span> <span style="color:#f67400">4</span>);
|
|
<span style="color:#3daee9;font-weight:bold">begin</span>
|
|
x <span style="color:#27ae60">:=</span> ( <span style="color:#f67400">1</span><span style="color:#27ae60">,</span> <span style="color:#f67400">2</span><span style="color:#27ae60">,</span> <span style="color:#f67400">3</span> );
|
|
z <span style="color:#27ae60">:=</span> x <span style="color:#27ae60">&</span> y;
|
|
w <span style="color:#27ae60">:=</span> <span style="color:#f67400">1</span> <span style="color:#27ae60">&</span> x;
|
|
s <span style="color:#27ae60">:=</span> <span style="color:#f67400">'h'</span> <span style="color:#27ae60">&</span> string<span style="color:#f67400">'("ello")</span>;
|
|
<span style="font-weight:bold">assert</span> <span style="color:#f44f4f">"10"</span> <span style="color:#27ae60">=</span> (b(<span style="color:#f67400">1</span>) <span style="color:#27ae60">&</span> <span style="color:#f44f4f">"0"</span>);
|
|
<span style="font-weight:bold">wait</span>;
|
|
<span style="color:#3daee9;font-weight:bold">end process;</span>
|
|
|
|
<span style="color:#2980b9;font-weight:bold">function</span> <span style="color:#f67400;font-weight:bold">CounterVal</span>(Seconds <span style="color:#27ae60">:</span> <span style="color:#2980b9">integer</span> <span style="color:#27ae60">:=</span> <span style="color:#f67400">0</span>) <span style="color:#fdbc4b;font-weight:bold">return</span> <span style="color:#2980b9">integer</span> <span style="font-weight:bold">is</span>
|
|
<span style="color:#27ae60">variable</span> TotalSeconds <span style="color:#27ae60">:</span> interger;
|
|
<span style="color:#2980b9;font-weight:bold">begin</span>
|
|
TotalSeconds <span style="color:#27ae60">:=</span> Seconds <span style="color:#27ae60">+</span> Minutes <span style="color:#27ae60">*</span> <span style="color:#f67400">60</span>;
|
|
<span style="color:#fdbc4b;font-weight:bold">return</span> TotalSeconds <span style="color:#27ae60">*</span> ClockFrequencyHz <span style="color:#27ae60">-</span><span style="color:#f67400">1</span>;
|
|
<span style="color:#2980b9;font-weight:bold">end function;</span>
|
|
|
|
<span style="color:#27ae60">type</span> enum_type <span style="color:#27ae60">is</span> (a<span style="color:#27ae60">,</span> b<span style="color:#27ae60">,</span> c<span style="color:#27ae60">,</span> <span style="color:#27ae60">...,</span> z);
|
|
<span style="color:#27ae60">type</span> int_array <span style="color:#27ae60">is</span> <span style="font-weight:bold">array</span>(<span style="color:#f67400">3</span> <span style="color:#27ae60">downto</span> <span style="color:#f67400">0</span>) <span style="font-weight:bold">of</span> <span style="color:#2980b9">integer</span>;
|
|
|
|
<span style="font-weight:bold">subtype</span> addr_int <span style="font-weight:bold">is</span> <span style="color:#2980b9">integer</span> <span style="font-weight:bold">range</span> <span style="color:#f67400">0</span> <span style="color:#27ae60">to</span> <span style="color:#f67400">65535</span>;
|
|
<span style="font-weight:bold">subtype</span> sub_enum_type <span style="font-weight:bold">is</span> enum_type <span style="font-weight:bold">range</span> a <span style="color:#27ae60">to</span> m;
|
|
|
|
<span style="color:#f67400;font-weight:bold">inst1</span><span style="color:#27ae60">:</span> <span style="font-weight:bold">entity</span> <span style="color:#8e44ad">work.counter1</span>(rtl)
|
|
<span style="font-weight:bold">generic map </span>(BITS1 <span style="color:#27ae60">=></span> <span style="color:#f67400">8</span>)
|
|
<span style="font-weight:bold">port map </span>(
|
|
clk1 <span style="color:#27ae60">=></span> Clock<span style="color:#27ae60">,</span>
|
|
DATA_OUT <span style="color:#27ae60">=></span> pwm_data_o(<span style="color:#f67400">3</span> <span style="color:#27ae60">downto</span> <span style="color:#f67400">5</span>)<span style="color:#27ae60">,</span>
|
|
COMP_IN(<span style="color:#f67400">1</span> <span style="color:#27ae60">downto</span> <span style="color:#f67400">0</span>) <span style="color:#27ae60">=></span> compensate_i<span style="color:#27ae60">,</span>
|
|
WRITE_IN <span style="color:#27ae60">=></span> (<span style="color:#27ae60">others</span> <span style="color:#27ae60">=></span> <span style="color:#f67400">'0'</span>)
|
|
);
|
|
|
|
<span style="color:#f67400;font-weight:bold">inst2</span><span style="color:#27ae60">:</span> <span style="font-weight:bold">component</span> <span style="color:#8e44ad">counter2</span>
|
|
<span style="font-weight:bold">generic map </span>(BITS1 <span style="color:#27ae60">=></span> <span style="color:#f67400">8</span>)
|
|
<span style="font-weight:bold">port map </span>(clk1 <span style="color:#27ae60">=></span> Clock);
|
|
|
|
<span style="color:#f67400;font-weight:bold">inst3</span><span style="color:#27ae60">:</span> <span style="font-weight:bold">configuration</span> <span style="color:#8e44ad">counter3</span>
|
|
<span style="font-weight:bold">generic map </span>(BITS1 <span style="color:#27ae60">=></span> <span style="color:#f67400">8</span>)
|
|
<span style="font-weight:bold">port map </span>(clk1 <span style="color:#27ae60">=></span> Clock);
|
|
|
|
<span style="color:#f67400;font-weight:bold">THE_PWM_GEN</span> <span style="color:#27ae60">:</span> <span style="color:#8e44ad">pwm_generator</span>
|
|
<span style="font-weight:bold">generic map</span>(
|
|
dsfds <span style="color:#27ae60">=></span> ds
|
|
)
|
|
<span style="font-weight:bold">port map</span>(
|
|
CLK <span style="color:#27ae60">=></span> clk_i<span style="color:#27ae60">,</span>
|
|
DATA_IN <span style="color:#27ae60">=></span> pwm_data_i<span style="color:#27ae60">,</span>
|
|
DATA_OUT <span style="color:#27ae60">=></span> pwm_data_o(<span style="color:#f67400">3</span> <span style="color:#27ae60">downto</span> <span style="color:#f67400">5</span>)<span style="color:#27ae60">,</span>
|
|
COMP_IN(<span style="color:#f67400">1</span> <span style="color:#27ae60">downto</span> <span style="color:#f67400">0</span>) <span style="color:#27ae60">=></span> compensate_i<span style="color:#27ae60">,</span>
|
|
WRITE_IN <span style="color:#27ae60">=></span> (<span style="color:#27ae60">others</span> <span style="color:#27ae60">=></span> <span style="color:#f67400">'0'</span>)
|
|
);
|
|
|
|
<span style="color:#fdbc4b;font-weight:bold">end architecture;</span>
|
|
|
|
<span style="color:#fdbc4b;font-weight:bold">architecture</span> <span style="color:#f67400;font-weight:bold">a2</span> <span style="font-weight:bold">of</span> <span style="color:#8e44ad">e</span> <span style="font-weight:bold">is</span>
|
|
<span style="color:#2980b9;font-weight:bold">function</span> <span style="color:#f44f4f">">"</span>(a<span style="color:#27ae60">,</span> b<span style="color:#27ae60">:</span> my_int) <span style="color:#fdbc4b;font-weight:bold">return</span> <span style="color:#2980b9">boolean</span>;
|
|
<span style="color:#fdbc4b;font-weight:bold">begin</span>
|
|
<span style="color:#3daee9;font-weight:bold">process</span> <span style="font-weight:bold">is</span>
|
|
<span style="color:#27ae60">variable</span> x<span style="color:#27ae60">,</span> y <span style="color:#27ae60">:</span> my_int;
|
|
<span style="color:#3daee9;font-weight:bold">begin</span>
|
|
<span style="font-weight:bold">assert</span> x <span style="color:#27ae60">></span> y;
|
|
<span style="font-weight:bold">assert</span> x <span style="color:#27ae60"><</span> y; <span style="color:#7a7c7d">-- Error</span>
|
|
<span style="color:#3daee9;font-weight:bold">end process;</span>
|
|
|
|
<span style="color:#f67400;font-weight:bold">billowitch_tc586</span><span style="color:#27ae60">:</span> <span style="color:#fdbc4b;font-weight:bold">block</span> <span style="font-weight:bold">is</span>
|
|
<span style="color:#27ae60">type</span> real_cons_vector <span style="color:#27ae60">is</span> <span style="font-weight:bold">array</span> (<span style="color:#f67400">15</span> <span style="color:#27ae60">downto</span> <span style="color:#f67400">0</span>) <span style="font-weight:bold">of</span> <span style="color:#2980b9">real</span>;
|
|
<span style="color:#27ae60">type</span> real_cons_vector_file <span style="color:#27ae60">is</span> <span style="font-weight:bold">file</span> <span style="font-weight:bold">of</span> real_cons_vector;
|
|
<span style="color:#27ae60">constant</span> C19 <span style="color:#27ae60">:</span> real_cons_vector <span style="color:#27ae60">:=</span> (<span style="color:#27ae60">others</span> <span style="color:#27ae60">=></span> <span style="color:#f67400">3</span><span style="color:#27ae60">.</span><span style="color:#f67400">0</span>);
|
|
<span style="font-weight:bold">begin</span>
|
|
<span style="color:#fdbc4b;font-weight:bold">end block;</span>
|
|
<span style="color:#fdbc4b;font-weight:bold">end architecture;</span>
|
|
|
|
<span style="color:#fdbc4b;font-weight:bold">architecture</span> <span style="color:#f67400;font-weight:bold">arch</span> <span style="font-weight:bold">of</span> <span style="color:#8e44ad">ent</span> <span style="font-weight:bold">is</span>
|
|
<span style="color:#fdbc4b;font-weight:bold">begin</span>
|
|
<span style="color:#f67400;font-weight:bold">LL</span><span style="color:#27ae60">:</span> <span style="color:#fdbc4b;font-weight:bold">if</span> test<span style="color:#27ae60">=</span><span style="color:#f67400">10</span> <span style="color:#fdbc4b;font-weight:bold">generate</span>
|
|
<span style="color:#fdbc4b;font-weight:bold">begin</span>
|
|
<span style="color:#fdbc4b;font-weight:bold">end;</span>
|
|
<span style="color:#fdbc4b;font-weight:bold">elsif</span> test<span style="color:#27ae60">=</span><span style="color:#f67400">5</span> <span style="color:#fdbc4b;font-weight:bold">generate</span>
|
|
<span style="color:#fdbc4b;font-weight:bold">begin</span>
|
|
<span style="color:#fdbc4b;font-weight:bold">end;</span>
|
|
<span style="color:#fdbc4b;font-weight:bold">end generate;</span>
|
|
|
|
<span style="color:#f67400;font-weight:bold">LL</span><span style="color:#27ae60">:</span> <span style="color:#fdbc4b;font-weight:bold">if</span> <span style="color:#f67400;font-weight:bold">l1</span><span style="color:#27ae60">:</span> SPEED <span style="color:#27ae60">=</span> <span style="color:#f44f4f">"fast"</span> <span style="color:#fdbc4b;font-weight:bold">generate</span>
|
|
<span style="color:#fdbc4b;font-weight:bold">elsif</span> test<span style="color:#27ae60">=</span><span style="color:#f67400">5</span> <span style="color:#fdbc4b;font-weight:bold">generate</span>
|
|
<span style="color:#fdbc4b;font-weight:bold">end generate;</span>
|
|
<span style="color:#fdbc4b;font-weight:bold">end architecture arch;</span>
|
|
|
|
|
|
<span style="color:#fdbc4b;font-weight:bold">architecture</span> <span style="color:#f67400;font-weight:bold">thing_arch</span> <span style="font-weight:bold">of</span> <span style="color:#8e44ad">designthing</span> <span style="font-weight:bold">is</span>
|
|
|
|
<span style="color:#fdbc4b;font-weight:bold">component</span> <span style="color:#f67400;font-weight:bold">pwm_generator</span>
|
|
<span style="color:#fdbc4b;font-weight:bold">port</span>(
|
|
CLK <span style="color:#27ae60">:</span> <span style="font-weight:bold">in</span> <span style="color:#2980b9">std_logic</span>;
|
|
DATA_IN <span style="color:#27ae60">:</span> <span style="font-weight:bold">in</span> <span style="color:#2980b9">std_logic_vector</span>(<span style="color:#f67400">15</span> <span style="color:#27ae60">downto</span> <span style="color:#f67400">0</span>);
|
|
);
|
|
<span style="color:#fdbc4b;font-weight:bold">end component pwm_generator;</span>
|
|
|
|
<span style="color:#27ae60">attribute</span> NOM_FREQ <span style="color:#27ae60">:</span> <span style="color:#2980b9">string</span>;
|
|
<span style="color:#27ae60">attribute</span> NOM_FREQ <span style="font-weight:bold">of</span> clk_source <span style="color:#27ae60">:</span> <span style="font-weight:bold">label</span> <span style="font-weight:bold">is</span> <span style="color:#f44f4f">"133.00"</span>;
|
|
<span style="color:#27ae60">signal</span> clk_i <span style="color:#27ae60">:</span> <span style="color:#2980b9">std_logic</span>;
|
|
|
|
<span style="color:#fdbc4b;font-weight:bold">begin</span>
|
|
|
|
<span style="color:#f67400;font-weight:bold">gen_no_comp</span><span style="color:#27ae60">:</span> <span style="color:#fdbc4b;font-weight:bold">if</span> TEMP <span style="color:#27ae60">=</span> <span style="color:#f67400">0</span> <span style="color:#fdbc4b;font-weight:bold">generate</span>
|
|
compensate_i <span style="color:#27ae60"><=</span> (<span style="color:#27ae60">others</span> <span style="color:#27ae60">=></span> <span style="color:#f67400">'0'</span>);
|
|
<span style="color:#fdbc4b;font-weight:bold">end generate;</span>
|
|
|
|
<span style="color:#f67400;font-weight:bold">gen_no_comp</span><span style="color:#27ae60">:</span> <span style="color:#fdbc4b;font-weight:bold">for</span> i <span style="font-weight:bold">in</span> <span style="color:#f67400">0</span> <span style="color:#27ae60">to</span> TEMP <span style="color:#fdbc4b;font-weight:bold">generate</span>
|
|
compensate_i <span style="color:#27ae60"><=</span> (<span style="color:#27ae60">others</span> <span style="color:#27ae60">=></span> <span style="color:#f67400">'0'</span>) <span style="font-weight:bold">after</span> <span style="color:#f67400">10</span> <span style="color:#2980b9">ns</span>;
|
|
compensate_i <span style="color:#27ae60"><=</span> (<span style="color:#27ae60">others</span> <span style="color:#27ae60">=></span> <span style="color:#f67400">'0'</span>) ;
|
|
<span style="color:#fdbc4b;font-weight:bold">end generate;</span>
|
|
|
|
<span style="color:#7a7c7d">---------------------------------------------------------------------------</span>
|
|
<span style="color:#7a7c7d">-- LED blinking when activity on inputs</span>
|
|
<span style="color:#7a7c7d">---------------------------------------------------------------------------</span>
|
|
<span style="color:#f67400;font-weight:bold">PROC_TIMER</span> <span style="color:#27ae60">:</span> <span style="color:#3daee9;font-weight:bold">process</span> <span style="color:#3daee9;font-weight:bold">begin</span>
|
|
<span style="font-weight:bold">wait</span> <span style="font-weight:bold">until</span> <span style="font-weight:bold">rising_edge</span>(clk_i);
|
|
timer <span style="color:#27ae60"><=</span> timer <span style="color:#27ae60">+</span> <span style="color:#f67400">1</span>;
|
|
<span style="font-weight:bold">wait</span> <span style="font-weight:bold">for</span> <span style="color:#f67400">10</span> <span style="color:#2980b9">ns</span>;
|
|
leds <span style="color:#27ae60"><=</span> (last_inp <span style="font-weight:bold">xor</span> inp_status(<span style="color:#f67400">3</span> <span style="color:#27ae60">downto</span> <span style="color:#f67400">0</span>)) <span style="font-weight:bold">or</span> leds <span style="font-weight:bold">or</span> last_leds;
|
|
<span style="color:#fdbc4b;font-weight:bold">if</span> timer <span style="color:#27ae60">=</span> <span style="color:#f67400">0</span> <span style="color:#fdbc4b;font-weight:bold">then</span>
|
|
leds <span style="color:#27ae60"><=</span> <span style="font-weight:bold">not</span> inp_status(<span style="color:#f67400">3</span> <span style="color:#27ae60">downto</span> <span style="color:#f67400">0</span>);
|
|
last_leds <span style="color:#27ae60"><=</span> x<span style="color:#f44f4f">"0"</span>;
|
|
<span style="color:#fdbc4b;font-weight:bold">elsif</span> gf <span style="color:#fdbc4b;font-weight:bold">then</span>
|
|
fdsa <span style="color:#27ae60"><=</span> <span style="color:#f67400">'1'</span>;
|
|
<span style="color:#fdbc4b;font-weight:bold">end if;</span>
|
|
|
|
<span style="color:#f67400;font-weight:bold">xz</span><span style="color:#27ae60">:</span> <span style="color:#fdbc4b;font-weight:bold">for</span> x <span style="font-weight:bold">in</span> <span style="color:#f67400">0</span> <span style="color:#27ae60">to</span> <span style="color:#f67400">7</span> <span style="color:#fdbc4b;font-weight:bold">loop</span>
|
|
dsadf;
|
|
<span style="color:#fdbc4b;font-weight:bold">end loop;</span>
|
|
|
|
<span style="color:#fdbc4b;font-weight:bold">case</span> c <span style="font-weight:bold">is</span>
|
|
<span style="color:#fdbc4b;font-weight:bold">when</span> <span style="color:#f67400;font-weight:bold">XXX</span> <span style="color:#27ae60">=></span>
|
|
c <span style="color:#27ae60"><=</span> <span style="color:#f67400">1</span>;
|
|
d <span style="color:#27ae60"><=</span> <span style="color:#f67400">21321</span>;
|
|
<span style="color:#fdbc4b;font-weight:bold">when</span> <span style="color:#f67400;font-weight:bold">YYYY</span> <span style="color:#27ae60">=></span>
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|
c <span style="color:#27ae60"><=</span> <span style="color:#f67400">2</span>;
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<span style="color:#fdbc4b;font-weight:bold">end case;</span>
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<span style="color:#3daee9;font-weight:bold">end process;</span>
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<span style="color:#f67400;font-weight:bold">generate_with_begin</span><span style="color:#27ae60">:</span> <span style="color:#fdbc4b;font-weight:bold">if</span> TEMP <span style="color:#27ae60">=</span> <span style="color:#f67400">0</span> <span style="color:#fdbc4b;font-weight:bold">generate</span>
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<span style="color:#27ae60">signal</span> <span style="color:#27ae60">:</span> test <span style="color:#27ae60">:</span> <span style="color:#2980b9">std_logic</span>;
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<span style="color:#fdbc4b;font-weight:bold">begin</span>
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compensate_i <span style="color:#27ae60"><=</span> (<span style="color:#27ae60">others</span> <span style="color:#27ae60">=></span> <span style="color:#f67400">'0'</span>);
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<span style="color:#fdbc4b;font-weight:bold">if</span> timer <span style="color:#27ae60">=</span> <span style="color:#f67400">0</span> <span style="color:#fdbc4b;font-weight:bold">then</span>
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leds <span style="color:#27ae60"><=</span> <span style="font-weight:bold">not</span> inp_status(<span style="color:#f67400">3</span> <span style="color:#27ae60">downto</span> <span style="color:#f67400">0</span>);
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last_leds <span style="color:#27ae60"><=</span> x<span style="color:#f44f4f">"0"</span>;
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<span style="color:#fdbc4b;font-weight:bold">elsif</span> gf <span style="color:#fdbc4b;font-weight:bold">then</span>
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fdsa <span style="color:#27ae60"><=</span> <span style="color:#f67400">'1'</span>;
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<span style="color:#fdbc4b;font-weight:bold">end if;</span>
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<span style="color:#fdbc4b;font-weight:bold">end generate generate_with_begin;</span>
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<span style="color:#f67400;font-weight:bold">PROC_TIMER</span> <span style="color:#27ae60">:</span> <span style="color:#3daee9;font-weight:bold">process</span>
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<span style="color:#27ae60">variable</span> x <span style="color:#27ae60">:</span> <span style="color:#2980b9">std_logic</span>;
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<span style="color:#3daee9;font-weight:bold">begin</span>
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x <span style="color:#27ae60">:=</span> <span style="color:#f67400">'0'</span>;
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<span style="color:#3daee9;font-weight:bold">end process PROC_TIMER;</span>
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<span style="color:#da4453;font-weight:bold;text-decoration:underline">end architecture thing_arc;</span> <span style="color:#7a7c7d">--this is not correct (wrong name)</span>
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<span style="color:#f67400">1</span><span style="color:#27ae60">+</span><span style="color:#f67400">1</span>
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<span style="color:#f67400">2</span><span style="color:#2980b9">ns</span>
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<span style="color:#f67400">1_2_3</span>
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<span style="color:#f67400">12_3</span>
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<span style="color:#f67400">1</span><span style="color:#27ae60">.</span><span style="color:#f67400">2</span>
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<span style="color:#f67400">1</span><span style="color:#27ae60">.</span><span style="color:#f67400">2_3</span>
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<span style="color:#f67400">1_3</span><span style="color:#27ae60">.</span><span style="color:#f67400">2_3</span>
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<span style="color:#f67400">12_3</span><span style="color:#f67400">e+1</span>
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<span style="color:#f67400">12_3</span><span style="color:#f67400">e-1</span>
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<span style="color:#f67400">12_3</span><span style="color:#f67400">e1_1</span>
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<span style="color:#f67400">12_3</span><span style="color:#27ae60">.</span><span style="color:#f67400">4</span><span style="color:#f67400">e1_1</span>
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<span style="color:#f67400">12_3</span><span style="color:#f67400">e1</span>_
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<span style="color:#f67400">12_3</span><span style="color:#da4453;font-weight:bold;text-decoration:underline">e</span>
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<span style="color:#f67400">2</span><span style="color:#27ae60">#</span><span style="color:#f67400">1_2_3</span><span style="color:#27ae60">#</span><span style="color:#f67400">E+8</span>
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<span style="color:#f67400">2</span><span style="color:#27ae60">#</span><span style="color:#f67400">1_2</span><span style="color:#27ae60">.</span><span style="color:#f67400">3</span><span style="color:#27ae60">#</span><span style="color:#f67400">E+8</span>
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<span style="color:#f67400">2</span><span style="color:#27ae60">#</span><span style="color:#f67400">1_f2</span><span style="color:#27ae60">.</span><span style="color:#f67400">3</span><span style="color:#27ae60">#</span>
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<span style="color:#f67400">3</span><span style="color:#27ae60">.</span><span style="color:#f67400">14159_26536</span> <span style="color:#7a7c7d">-- A literal of type universal_real.</span>
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<span style="color:#f67400">5280</span> <span style="color:#7a7c7d">-- A literal of type universal_integer.</span>
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<span style="color:#f67400">10</span><span style="color:#27ae60">.</span><span style="color:#f67400">7</span> <span style="color:#2980b9">ns</span> <span style="color:#7a7c7d">-- A literal of a physical type.</span>
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O<span style="color:#f44f4f">"4777"</span> <span style="color:#7a7c7d">-- A bit string literal.</span>
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<span style="color:#f44f4f">"54LS281"</span> <span style="color:#7a7c7d">-- A string literal.</span>
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<span style="color:#f44f4f">""</span> <span style="color:#7a7c7d">-- A string literal representing a null array.</span>
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B<span style="color:#f44f4f">"1111_1111_1111"</span> <span style="color:#7a7c7d">-- Equivalent to the string literal "111111111111".</span>
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X<span style="color:#f44f4f">"FFF"</span> <span style="color:#7a7c7d">-- Equivalent to B"1111_1111_1111".</span>
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O<span style="color:#f44f4f">"777"</span> <span style="color:#7a7c7d">-- Equivalent to B"111_111_111".</span>
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X<span style="color:#f44f4f">"777"</span> <span style="color:#7a7c7d">-- Equivalent to B"0111_0111_0111".</span>
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B<span style="color:#f44f4f">"XXXX_01LH"</span> <span style="color:#7a7c7d">-- Equivalent to the string literal "XXXX01LH"</span>
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UO<span style="color:#f44f4f">"27"</span> <span style="color:#7a7c7d">-- Equivalent to B"010_111"</span>
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UO<span style="color:#f44f4f">"2C"</span> <span style="color:#7a7c7d">-- Equivalent to B"011_CCC"</span>
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SX<span style="color:#f44f4f">"3W"</span> <span style="color:#7a7c7d">-- Equivalent to B"0011_WWWW"</span>
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D<span style="color:#f44f4f">"35"</span> <span style="color:#7a7c7d">-- Equivalent to B"100011"</span>
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<span style="color:#f67400">12</span>UB<span style="color:#f44f4f">"X1"</span> <span style="color:#7a7c7d">-- Equivalent to B"0000_0000_00X1"</span>
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<span style="color:#f67400">12</span>SB<span style="color:#f44f4f">"X1"</span> <span style="color:#7a7c7d">-- Equivalent to B"XXXX_XXXX_XXX1"</span>
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<span style="color:#f67400">12</span>UX<span style="color:#f44f4f">"F-"</span> <span style="color:#7a7c7d">-- Equivalent to B"0000_1111_----"</span>
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<span style="color:#f67400">12</span>SX<span style="color:#f44f4f">"F-"</span> <span style="color:#7a7c7d">-- Equivalent to B"1111_1111_----"</span>
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<span style="color:#f67400">12</span>D<span style="color:#f44f4f">"13"</span> <span style="color:#7a7c7d">-- Equivalent to B"0000_0000_1101"</span>
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<span style="color:#f67400">12</span>UX<span style="color:#f44f4f">"000WWW"</span> <span style="color:#7a7c7d">-- Equivalent to B"WWWW_WWWW_WWWW"</span>
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<span style="color:#f67400">12</span>SX<span style="color:#f44f4f">"FFFC00"</span> <span style="color:#7a7c7d">-- Equivalent to B"1100_0000_0000"</span>
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<span style="color:#f67400">12</span>SX<span style="color:#f44f4f">"XXXX00"</span> <span style="color:#7a7c7d">-- Equivalent to B"XXXX_0000_0000"</span>
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<span style="color:#f67400">8</span>D<span style="color:#f44f4f">"511"</span> <span style="color:#7a7c7d">-- Error</span>
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<span style="color:#f67400">8</span>UO<span style="color:#f44f4f">"477"</span> <span style="color:#7a7c7d">-- Error</span>
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<span style="color:#f67400">8</span>SX<span style="color:#f44f4f">"0FF"</span> <span style="color:#7a7c7d">-- Error</span>
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<span style="color:#f67400">8</span>SX<span style="color:#f44f4f">"FXX"</span> <span style="color:#7a7c7d">-- Error</span>
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</pre></body></html>
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