252 lines
9.0 KiB
Rust
252 lines
9.0 KiB
Rust
//! The eXtensible Host Controller Interface (XHCI) Daemon
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//!
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//! This crate provides the executable xhcid daemon that implements the driver for interacting with
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//! a PCIe XHCI device
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//!
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//! XHCI is a standard for the USB Host Controller interface specified by Intel that provides a
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//! common register interface for systems to use to interact with the Universal Serial Bus (USB)
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//! subsystem.
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//!
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//! USB consists of three types of devices: The Host Controller/Root Hub, USB Hubs, and Endpoints.
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//! Endpoints represent actual devices connected to the USB fabric. USB Hubs are intermediaries
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//! between the Host Controller and the endpoints that report when devices have been connected/disconnected.
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//! The Host Controller provides the interface to the USB subsystem that software running on the
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//! system's CPU can interact with. It's a tree-like structure, which the Host Controller enumerating
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//! and addressing all the hubs and endpoints in the tree. Data then flows through the fabric
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//! using the USB protocol (2.0 or 3.2) as packets. Hubs have multiple ports that endpoints can
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//! connect to, and they notify the Host Controller/Root Hub when devices are hot plugged or removed.
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//!
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//! This documentation will refer directly to the relevant standards, which are as follows:
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//!
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//! - XHCI - [eXtensible Host Controller Interface for Universal Serial Bus (xHCI) Requirements Specification](https://www.intel.com/content/dam/www/public/us/en/documents/technical-specifications/extensible-host-controler-interface-usb-xhci.pdf)
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//! - USB2 - [Universal Serial Bus Specification](https://www.usb.org/document-library/usb-20-specification)
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//! - USB32 - [Universal Serial Bus 3.2 Specification Revision 1.1](https://usb.org/document-library/usb-32-revision-11-june-2022)
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//!
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#![warn(missing_docs)]
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#[macro_use]
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extern crate bitflags;
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use std::fs::File;
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use std::io::{Read, Write};
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use std::os::unix::io::{FromRawFd, RawFd};
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use std::ptr::NonNull;
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use std::sync::{Arc, Mutex};
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use libredox::flag;
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#[cfg(target_arch = "x86_64")]
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use pcid_interface::irq_helpers::allocate_single_interrupt_vector_for_msi;
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use pcid_interface::irq_helpers::read_bsp_apic_id;
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use pcid_interface::msi::MsixTableEntry;
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use pcid_interface::{
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MsiSetFeatureInfo, PciFeature, PciFeatureInfo, PciFunctionHandle, SetFeatureInfo,
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};
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use syscall::data::Packet;
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use syscall::error::EWOULDBLOCK;
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use syscall::scheme::Scheme;
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use crate::xhci::{InterruptMethod, Xhci};
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// Declare as pub so that no warnings appear due to parts of the interface code not being used by
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// the driver. Since there's also a dedicated crate for the driver interface, those warnings don't
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// mean anything.
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pub mod driver_interface;
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mod usb;
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mod xhci;
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#[cfg(target_arch = "x86_64")]
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fn get_int_method(
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pcid_handle: &mut PciFunctionHandle,
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bar0_address: usize,
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) -> (Option<File>, InterruptMethod) {
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let pci_config = pcid_handle.config();
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let all_pci_features = pcid_handle
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.fetch_all_features()
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.expect("xhcid: failed to fetch pci features");
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log::debug!("XHCI PCI FEATURES: {:?}", all_pci_features);
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let has_msi = all_pci_features.iter().any(|feature| feature.is_msi());
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let has_msix = all_pci_features.iter().any(|feature| feature.is_msix());
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if has_msi && !has_msix {
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let mut capability = match pcid_handle
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.feature_info(PciFeature::Msi)
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.expect("xhcid: failed to retrieve the MSI capability structure from pcid")
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{
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PciFeatureInfo::Msi(s) => s,
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PciFeatureInfo::MsiX(_) => panic!(),
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};
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// TODO: Allow allocation of up to 32 vectors.
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// TODO: Find a way to abstract this away, potantially as a helper module for
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// pcid_interface, so that this can be shared between nvmed, xhcid, ixgebd, etc..
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let destination_id = read_bsp_apic_id().expect("xhcid: failed to read BSP apic id");
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let (msg_addr_and_data, interrupt_handle) =
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allocate_single_interrupt_vector_for_msi(destination_id);
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let set_feature_info = MsiSetFeatureInfo {
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multi_message_enable: Some(0),
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message_address_and_data: Some(msg_addr_and_data),
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mask_bits: None,
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};
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pcid_handle
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.set_feature_info(SetFeatureInfo::Msi(set_feature_info))
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.expect("xhcid: failed to set feature info");
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pcid_handle
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.enable_feature(PciFeature::Msi)
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.expect("xhcid: failed to enable MSI");
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log::debug!("Enabled MSI");
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(Some(interrupt_handle), InterruptMethod::Msi)
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} else if has_msix {
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let msix_info = match pcid_handle
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.feature_info(PciFeature::MsiX)
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.expect("xhcid: failed to retrieve the MSI-X capability structure from pcid")
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{
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PciFeatureInfo::Msi(_) => panic!(),
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PciFeatureInfo::MsiX(s) => s,
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};
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msix_info.validate(pci_config.func.bars);
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assert_eq!(msix_info.table_bar, 0);
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let virt_table_base =
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(bar0_address + msix_info.table_offset as usize) as *mut MsixTableEntry;
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let mut info = xhci::MappedMsixRegs {
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virt_table_base: NonNull::new(virt_table_base).unwrap(),
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info: msix_info,
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};
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// Allocate one msi vector.
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let method = {
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// primary interrupter
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let k = 0;
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assert_eq!(std::mem::size_of::<MsixTableEntry>(), 16);
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let table_entry_pointer = info.table_entry_pointer(k);
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let destination_id = read_bsp_apic_id().expect("xhcid: failed to read BSP apic id");
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let (msg_addr_and_data, interrupt_handle) =
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allocate_single_interrupt_vector_for_msi(destination_id);
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table_entry_pointer.write_addr_and_data(msg_addr_and_data);
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table_entry_pointer.unmask();
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(
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Some(interrupt_handle),
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InterruptMethod::MsiX(Mutex::new(info)),
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)
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};
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pcid_handle
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.enable_feature(PciFeature::MsiX)
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.expect("xhcid: failed to enable MSI-X");
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log::debug!("Enabled MSI-X");
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method
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} else if let Some(irq) = pci_config.func.legacy_interrupt_line {
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log::debug!("Legacy IRQ {}", irq);
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// legacy INTx# interrupt pins.
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(Some(irq.irq_handle("xhcid")), InterruptMethod::Intx)
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} else {
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// no interrupts at all
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(None, InterruptMethod::Polling)
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}
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}
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//TODO: MSI on non-x86_64?
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#[cfg(not(target_arch = "x86_64"))]
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fn get_int_method(
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pcid_handle: &mut PciFunctionHandle,
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address: usize,
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) -> (Option<File>, InterruptMethod) {
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let pci_config = pcid_handle.config();
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if let Some(irq) = pci_config.func.legacy_interrupt_line {
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// legacy INTx# interrupt pins.
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(Some(irq.irq_handle("xhcid")), InterruptMethod::Intx)
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} else {
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// no interrupts at all
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(None, InterruptMethod::Polling)
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}
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}
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fn main() {
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redox_daemon::Daemon::new(daemon).expect("xhcid: failed to daemonize");
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}
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fn daemon(daemon: redox_daemon::Daemon) -> ! {
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let mut pcid_handle =
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PciFunctionHandle::connect_default().expect("xhcid: failed to setup channel to pcid");
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let pci_config = pcid_handle.config();
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let mut name = pci_config.func.name();
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name.push_str("_xhci");
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common::setup_logging(
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"usb",
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"host",
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&name,
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log::LevelFilter::Info,
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log::LevelFilter::Info,
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);
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log::debug!("XHCI PCI CONFIG: {:?}", pci_config);
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let address = unsafe { pcid_handle.map_bar(0) }
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.expect("xhcid")
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.ptr
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.as_ptr() as usize;
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let (irq_file, interrupt_method) = (None, InterruptMethod::Polling); //get_int_method(&mut pcid_handle, address);
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//TODO: Fix interrupts.
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println!(" + XHCI {}", pci_config.func.display());
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let scheme_name = format!("usb.{}", name);
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let socket_fd =
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libredox::call::open(format!(":{}", scheme_name), flag::O_RDWR | flag::O_CREAT, 0)
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.expect("xhcid: failed to create usb scheme");
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let mut socket = unsafe { File::from_raw_fd(socket_fd as RawFd) };
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daemon.ready().expect("xhcid: failed to notify parent");
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let mut hci = Arc::new(
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Xhci::new(scheme_name, address, interrupt_method, pcid_handle)
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.expect("xhcid: failed to allocate device"),
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);
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xhci::start_irq_reactor(&hci, irq_file);
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xhci::start_device_enumerator(&hci);
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hci.poll();
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let mut todo = Vec::<Packet>::new();
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loop {
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let mut packet = Packet::default();
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match socket.read(&mut packet) {
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Ok(0) => break,
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Ok(_) => (),
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Err(err) => panic!("xhcid failed to read from socket: {err}"),
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}
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let a = packet.a;
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hci.handle(&mut packet);
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if packet.a == (-EWOULDBLOCK) as usize {
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packet.a = a;
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todo.push(packet);
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} else {
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socket
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.write(&packet)
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.expect("xhcid failed to write to socket");
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}
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}
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std::process::exit(0);
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}
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