vasilito
cb424d7448
verify-patch-sanity.py validates every active recipe .patch has internally- consistent hunk line counts — catching the 'malformed patch at line N' failure at commit/CI/preflight time instead of hours into a cook. This cycle hit that class three times (qtwaylandscanner, sddm, xwayland), each only discovered when cookbook tried to apply the patch. Running it across the repo found 29 latent malformed patches (validated against GNU patch: e.g. relibc/P3-sysv-ipc reproduces 'malformed patch at line 22'). They were harmless only because they sit in vendored recipes (baked, not re- applied) — but would fail on any version-bump re-derivation. --fix recounts the hunk headers (body untouched) and repaired all 29. Wired into build-preflight.sh (Phase 1.0D) and redbear-ci.yml, with a unit test (test-patch-sanity.sh). Skips archived/legacy trees and unvalidatable formats (empty placeholders, bare-@@ git hunks).
85 lines
3.6 KiB
C
85 lines
3.6 KiB
C
// REQUIRES: x86-registered-target
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/// Accept intel inline asm but write it out as att:
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// RUN: %clang_cc1 -triple i386-unknown-linux -mllvm -x86-asm-syntax=att -inline-asm=intel -Werror -target-feature +hreset -target-feature +pconfig -target-feature +sgx -ffreestanding -O0 -S %s -o - | FileCheck --check-prefix=ATT %s
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// RUN: %clang_cc1 -triple x86_64-unknown-linux -mllvm -x86-asm-syntax=att -inline-asm=intel -Werror -target-feature +hreset -target-feature +pconfig -target-feature +sgx -ffreestanding -O0 -S %s -o - | FileCheck --check-prefix=ATT %s
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/// Accept intel inline asm and write it out as intel:
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// RUN: %clang_cc1 -triple i386-unknown-linux -mllvm -x86-asm-syntax=intel -inline-asm=intel -Werror -target-feature +hreset -target-feature +pconfig -target-feature +sgx -ffreestanding -O0 -S %s -o - | FileCheck --check-prefix=INTEL %s
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// RUN: %clang_cc1 -triple x86_64-unknown-linux -mllvm -x86-asm-syntax=intel -inline-asm=intel -Werror -target-feature +hreset -target-feature +pconfig -target-feature +sgx -ffreestanding -O0 -S %s -o - | FileCheck --check-prefix=INTEL %s
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/// Check MS compat mode (_MSC_VER defined). The driver always picks intel
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/// output in that mode, so test only that.
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// RUN: %clang_cc1 -triple i386-pc-win32 -mllvm -x86-asm-syntax=intel -inline-asm=intel -Werror -target-feature +hreset -target-feature +pconfig -target-feature +sgx -ffreestanding -O0 -S %s -o - -fms-extensions -fms-compatibility -fms-compatibility-version=17.00 | FileCheck --check-prefix=INTEL %s
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// RUN: %clang_cc1 -triple x86_64-pc-win32 -mllvm -x86-asm-syntax=intel -inline-asm=intel -Werror -target-feature +hreset -target-feature +pconfig -target-feature +sgx -ffreestanding -O0 -S %s -o - -fms-extensions -fms-compatibility -fms-compatibility-version=17.00 | FileCheck --check-prefix=INTEL %s
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// Test that intrinsics headers still work with -masm=intel.
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#ifdef _MSC_VER
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#include <intrin.h>
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#else
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#include <x86intrin.h>
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#endif
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void f(void) {
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// Intrinsic headers contain macros and inline functions.
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// Inline assembly in both are checked only when they are
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// referenced, so reference a few intrinsics here.
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__SSC_MARK(4);
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int a;
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_hreset(a);
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_pconfig_u32(0, (void*)0);
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_encls_u32(0, (void*)0);
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_enclu_u32(0, (void*)0);
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_enclv_u32(0, (void*)0);
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#ifdef _MSC_VER
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__movsb((void*)0, (void*)0, 0);
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__movsd((void*)0, (void*)0, 0);
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__movsw((void*)0, (void*)0, 0);
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__stosb((void*)0, 0, 0);
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__stosd((void*)0, 0, 0);
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__stosw((void*)0, 0, 0);
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#ifdef __x86_64__
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__movsq((void*)0, (void*)0, 0);
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__stosq((void*)0, 0, 0);
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#endif
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__cpuid((void*)0, 0);
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__cpuidex((void*)0, 0, 0);
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__halt();
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__nop();
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__readmsr(0);
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__readcr3();
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__writecr3(0);
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_InterlockedExchange_HLEAcquire((void*)0, 0);
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_InterlockedExchange_HLERelease((void*)0, 0);
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_InterlockedCompareExchange_HLEAcquire((void*)0, 0, 0);
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_InterlockedCompareExchange_HLERelease((void*)0, 0, 0);
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#ifdef __x86_64__
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_InterlockedExchange64_HLEAcquire((void*)0, 0);
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_InterlockedExchange64_HLERelease((void*)0, 0);
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_InterlockedCompareExchange64_HLEAcquire((void*)0, 0, 0);
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_InterlockedCompareExchange64_HLERelease((void*)0, 0, 0);
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#endif
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#endif
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__asm__("mov eax, ebx");
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// ATT: movl %ebx, %eax
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// INTEL: mov eax, ebx
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// Explicitly overriding asm style per block works:
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__asm__(".att_syntax\nmovl %ebx, %eax");
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// ATT: movl %ebx, %eax
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// INTEL: mov eax, ebx
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// The .att_syntax was only scoped to the previous statement.
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// (This is different from gcc, where `.att_syntax` is in
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// effect from that point on, so portable code would want an
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// explicit `.intel_syntax noprefix\n` at the start of this string).
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__asm__("mov eax, ebx");
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// ATT: movl %ebx, %eax
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// INTEL: mov eax, ebx
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}
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