vasilito
cb424d7448
verify-patch-sanity.py validates every active recipe .patch has internally- consistent hunk line counts — catching the 'malformed patch at line N' failure at commit/CI/preflight time instead of hours into a cook. This cycle hit that class three times (qtwaylandscanner, sddm, xwayland), each only discovered when cookbook tried to apply the patch. Running it across the repo found 29 latent malformed patches (validated against GNU patch: e.g. relibc/P3-sysv-ipc reproduces 'malformed patch at line 22'). They were harmless only because they sit in vendored recipes (baked, not re- applied) — but would fail on any version-bump re-derivation. --fix recounts the hunk headers (body untouched) and repaired all 29. Wired into build-preflight.sh (Phase 1.0D) and redbear-ci.yml, with a unit test (test-patch-sanity.sh). Skips archived/legacy trees and unvalidatable formats (empty placeholders, bare-@@ git hunks).
91 lines
3.2 KiB
C
91 lines
3.2 KiB
C
// RUN: %clang_cc1 -triple thumbv8.1m.main-none-none-eabi \
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// RUN: -target-feature +cdecp0 -target-feature +mve.fp \
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// RUN: -mfloat-abi hard -O0 -disable-O0-optnone \
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// RUN: -emit-llvm -o - %s | opt -S -passes=mem2reg | FileCheck %s --check-prefixes=CHECK,CHECK-LE
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// RUN: %clang_cc1 -triple thumbebv8.1m.main-arm-none-eabi \
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// RUN: -target-feature +cdecp0 -target-feature +mve.fp \
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// RUN: -mfloat-abi hard -O0 -disable-O0-optnone \
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// RUN: -emit-llvm -o - %s | opt -S -passes=mem2reg | FileCheck %s --check-prefixes=CHECK,CHECK-BE
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// REQUIRES: aarch64-registered-target || arm-registered-target
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#include <arm_cde.h>
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// CHECK-LABEL: @test_s8(
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// CHECK-NEXT: entry:
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// CHECK-NEXT: ret <16 x i8> [[X:%.*]]
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//
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int8x16_t test_s8(uint8x16_t x) {
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return __arm_vreinterpretq_s8_u8(x);
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}
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// CHECK-LABEL: @test_u16(
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// CHECK-NEXT: entry:
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// CHECK-LE-NEXT: [[TMP0:%.*]] = bitcast <16 x i8> [[X:%.*]] to <8 x i16>
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// CHECK-BE-NEXT: [[TMP0:%.*]] = call <8 x i16> @llvm.arm.mve.vreinterpretq.v8i16.v16i8(<16 x i8> [[X:%.*]])
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// CHECK-NEXT: ret <8 x i16> [[TMP0]]
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//
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uint16x8_t test_u16(uint8x16_t x) {
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return __arm_vreinterpretq_u16_u8(x);
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}
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// CHECK-LABEL: @test_s32(
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// CHECK-NEXT: entry:
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// CHECK-LE-NEXT: [[TMP0:%.*]] = bitcast <16 x i8> [[X:%.*]] to <4 x i32>
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// CHECK-BE-NEXT: [[TMP0:%.*]] = call <4 x i32> @llvm.arm.mve.vreinterpretq.v4i32.v16i8(<16 x i8> [[X:%.*]])
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// CHECK-NEXT: ret <4 x i32> [[TMP0]]
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//
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int32x4_t test_s32(uint8x16_t x) {
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return __arm_vreinterpretq_s32_u8(x);
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}
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// CHECK-LABEL: @test_u32(
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// CHECK-NEXT: entry:
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// CHECK-LE-NEXT: [[TMP0:%.*]] = bitcast <16 x i8> [[X:%.*]] to <4 x i32>
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// CHECK-BE-NEXT: [[TMP0:%.*]] = call <4 x i32> @llvm.arm.mve.vreinterpretq.v4i32.v16i8(<16 x i8> [[X:%.*]])
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// CHECK-NEXT: ret <4 x i32> [[TMP0]]
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//
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uint32x4_t test_u32(uint8x16_t x) {
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return __arm_vreinterpretq_u32_u8(x);
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}
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// CHECK-LABEL: @test_s64(
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// CHECK-NEXT: entry:
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// CHECK-LE-NEXT: [[TMP0:%.*]] = bitcast <16 x i8> [[X:%.*]] to <2 x i64>
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// CHECK-BE-NEXT: [[TMP0:%.*]] = call <2 x i64> @llvm.arm.mve.vreinterpretq.v2i64.v16i8(<16 x i8> [[X:%.*]])
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// CHECK-NEXT: ret <2 x i64> [[TMP0]]
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//
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int64x2_t test_s64(uint8x16_t x) {
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return __arm_vreinterpretq_s64_u8(x);
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}
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// CHECK-LABEL: @test_u64(
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// CHECK-NEXT: entry:
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// CHECK-LE-NEXT: [[TMP0:%.*]] = bitcast <16 x i8> [[X:%.*]] to <2 x i64>
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// CHECK-BE-NEXT: [[TMP0:%.*]] = call <2 x i64> @llvm.arm.mve.vreinterpretq.v2i64.v16i8(<16 x i8> [[X:%.*]])
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// CHECK-NEXT: ret <2 x i64> [[TMP0]]
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//
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uint64x2_t test_u64(uint8x16_t x) {
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return __arm_vreinterpretq_u64_u8(x);
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}
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// CHECK-LABEL: @test_f16(
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// CHECK-NEXT: entry:
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// CHECK-LE-NEXT: [[TMP0:%.*]] = bitcast <16 x i8> [[X:%.*]] to <8 x half>
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// CHECK-BE-NEXT: [[TMP0:%.*]] = call <8 x half> @llvm.arm.mve.vreinterpretq.v8f16.v16i8(<16 x i8> [[X:%.*]])
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// CHECK-NEXT: ret <8 x half> [[TMP0]]
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//
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float16x8_t test_f16(uint8x16_t x) {
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return __arm_vreinterpretq_f16_u8(x);
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}
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// CHECK-LABEL: @test_f32(
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// CHECK-NEXT: entry:
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// CHECK-LE-NEXT: [[TMP0:%.*]] = bitcast <16 x i8> [[X:%.*]] to <4 x float>
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// CHECK-BE-NEXT: [[TMP0:%.*]] = call <4 x float> @llvm.arm.mve.vreinterpretq.v4f32.v16i8(<16 x i8> [[X:%.*]])
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// CHECK-NEXT: ret <4 x float> [[TMP0]]
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//
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float32x4_t test_f32(uint8x16_t x) {
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return __arm_vreinterpretq_f32_u8(x);
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}
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