vasilito
cb424d7448
verify-patch-sanity.py validates every active recipe .patch has internally- consistent hunk line counts — catching the 'malformed patch at line N' failure at commit/CI/preflight time instead of hours into a cook. This cycle hit that class three times (qtwaylandscanner, sddm, xwayland), each only discovered when cookbook tried to apply the patch. Running it across the repo found 29 latent malformed patches (validated against GNU patch: e.g. relibc/P3-sysv-ipc reproduces 'malformed patch at line 22'). They were harmless only because they sit in vendored recipes (baked, not re- applied) — but would fail on any version-bump re-derivation. --fix recounts the hunk headers (body untouched) and repaired all 29. Wired into build-preflight.sh (Phase 1.0D) and redbear-ci.yml, with a unit test (test-patch-sanity.sh). Skips archived/legacy trees and unvalidatable formats (empty placeholders, bare-@@ git hunks).
606 lines
23 KiB
C++
606 lines
23 KiB
C++
//========- unittests/Support/Host.cpp - Host.cpp tests --------------========//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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#include "llvm/TargetParser/Host.h"
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#include "llvm/ADT/SmallVector.h"
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#include "llvm/Config/config.h"
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#include "llvm/Support/FileSystem.h"
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#include "llvm/Support/Path.h"
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#include "llvm/Support/Program.h"
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#include "llvm/Support/Threading.h"
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#include "llvm/TargetParser/Triple.h"
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#include "gtest/gtest.h"
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#define ASSERT_NO_ERROR(x) \
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if (std::error_code ASSERT_NO_ERROR_ec = x) { \
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SmallString<128> MessageStorage; \
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raw_svector_ostream Message(MessageStorage); \
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Message << #x ": did not return errc::success.\n" \
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<< "error number: " << ASSERT_NO_ERROR_ec.value() << "\n" \
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<< "error message: " << ASSERT_NO_ERROR_ec.message() << "\n"; \
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GTEST_FATAL_FAILURE_(MessageStorage.c_str()); \
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} else { \
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}
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using namespace llvm;
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TEST(getLinuxHostCPUName, ARM) {
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StringRef CortexA9ProcCpuinfo = R"(
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processor : 0
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model name : ARMv7 Processor rev 10 (v7l)
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BogoMIPS : 1393.66
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Features : half thumb fastmult vfp edsp thumbee neon vfpv3 tls vfpd32
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CPU implementer : 0x41
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CPU architecture: 7
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CPU variant : 0x2
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CPU part : 0xc09
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CPU revision : 10
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processor : 1
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model name : ARMv7 Processor rev 10 (v7l)
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BogoMIPS : 1393.66
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Features : half thumb fastmult vfp edsp thumbee neon vfpv3 tls vfpd32
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CPU implementer : 0x41
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CPU architecture: 7
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CPU variant : 0x2
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CPU part : 0xc09
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CPU revision : 10
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Hardware : Generic OMAP4 (Flattened Device Tree)
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Revision : 0000
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Serial : 0000000000000000
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)";
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EXPECT_EQ(sys::detail::getHostCPUNameForARM(CortexA9ProcCpuinfo),
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"cortex-a9");
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EXPECT_EQ(sys::detail::getHostCPUNameForARM("CPU implementer : 0x41\n"
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"CPU part : 0xc0f"),
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"cortex-a15");
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// Verify that both CPU implementer and CPU part are checked:
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EXPECT_EQ(sys::detail::getHostCPUNameForARM("CPU implementer : 0x40\n"
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"CPU part : 0xc0f"),
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"generic");
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EXPECT_EQ(sys::detail::getHostCPUNameForARM("CPU implementer : 0x51\n"
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"CPU part : 0x06f"),
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"krait");
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}
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TEST(getLinuxHostCPUName, AArch64) {
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EXPECT_EQ(sys::detail::getHostCPUNameForARM("CPU implementer : 0x41\n"
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"CPU part : 0xd8f"),
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"cortex-a320");
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EXPECT_EQ(sys::detail::getHostCPUNameForARM("CPU implementer : 0x41\n"
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"CPU part : 0xd03"),
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"cortex-a53");
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EXPECT_EQ(sys::detail::getHostCPUNameForARM("CPU implementer : 0x41\n"
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"CPU part : 0xd05"),
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"cortex-a55");
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EXPECT_EQ(sys::detail::getHostCPUNameForARM("CPU implementer : 0x41\n"
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"CPU part : 0xd40"),
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"neoverse-v1");
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EXPECT_EQ(sys::detail::getHostCPUNameForARM("CPU implementer : 0x41\n"
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"CPU part : 0xd4f"),
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"neoverse-v2");
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EXPECT_EQ(sys::detail::getHostCPUNameForARM("CPU implementer : 0x41\n"
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"CPU part : 0xd84"),
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"neoverse-v3");
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EXPECT_EQ(sys::detail::getHostCPUNameForARM("CPU implementer : 0x41\n"
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"CPU part : 0xd0c"),
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"neoverse-n1");
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EXPECT_EQ(sys::detail::getHostCPUNameForARM("CPU implementer : 0x41\n"
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"CPU part : 0xd49"),
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"neoverse-n2");
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EXPECT_EQ(sys::detail::getHostCPUNameForARM("CPU implementer : 0x41\n"
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"CPU part : 0xd8e"),
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"neoverse-n3");
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// Verify that both CPU implementer and CPU part are checked:
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EXPECT_EQ(sys::detail::getHostCPUNameForARM("CPU implementer : 0x40\n"
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"CPU part : 0xd03"),
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"generic");
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EXPECT_EQ(sys::detail::getHostCPUNameForARM("CPU implementer : 0x51\n"
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"CPU part : 0x201"),
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"kryo");
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EXPECT_EQ(sys::detail::getHostCPUNameForARM("CPU implementer : 0x51\n"
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"CPU part : 0x800"),
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"cortex-a73");
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EXPECT_EQ(sys::detail::getHostCPUNameForARM("CPU implementer : 0x51\n"
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"CPU part : 0x801"),
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"cortex-a73");
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EXPECT_EQ(sys::detail::getHostCPUNameForARM("CPU implementer : 0x41\n"
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"CPU part : 0xd46"),
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"cortex-a510");
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EXPECT_EQ(sys::detail::getHostCPUNameForARM("CPU implementer : 0x41\n"
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"CPU part : 0xd47"),
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"cortex-a710");
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EXPECT_EQ(sys::detail::getHostCPUNameForARM("CPU implementer : 0x41\n"
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"CPU part : 0xd48"),
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"cortex-x2");
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EXPECT_EQ(sys::detail::getHostCPUNameForARM("CPU implementer : 0x41\n"
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"CPU part : 0xd85\n"
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"CPU part : 0xd87"),
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"cortex-x925");
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EXPECT_EQ(sys::detail::getHostCPUNameForARM("CPU implementer : 0x41\n"
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"CPU part : 0xd87\n"
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"CPU part : 0xd85"),
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"cortex-x925");
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EXPECT_EQ(sys::detail::getHostCPUNameForARM("CPU implementer : 0x51\n"
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"CPU part : 0xc00"),
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"falkor");
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EXPECT_EQ(sys::detail::getHostCPUNameForARM("CPU implementer : 0x51\n"
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"CPU part : 0xc01"),
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"saphira");
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EXPECT_EQ(sys::detail::getHostCPUNameForARM("CPU implementer : 0x6d\n"
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"CPU part : 0xd49"),
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"neoverse-n2");
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EXPECT_EQ(sys::detail::getHostCPUNameForARM("CPU implementer : 0xc0\n"
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"CPU part : 0xac3"),
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"ampere1");
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EXPECT_EQ(sys::detail::getHostCPUNameForARM("CPU implementer : 0xc0\n"
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"CPU part : 0xac4"),
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"ampere1a");
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EXPECT_EQ(sys::detail::getHostCPUNameForARM("CPU implementer : 0xc0\n"
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"CPU part : 0xac5"),
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"ampere1b");
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EXPECT_EQ(sys::detail::getHostCPUNameForARM("CPU implementer : 0x51\n"
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"CPU part : 0x001"),
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"oryon-1");
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EXPECT_EQ(sys::detail::getHostCPUNameForARM("CPU implementer : 0x46\n"
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"CPU part : 0x003"),
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"fujitsu-monaka");
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EXPECT_EQ(sys::detail::getHostCPUNameForARM("CPU implementer : 0x61\n"
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"CPU part : 0x039"),
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"apple-m2");
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// MSM8992/4 weirdness
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StringRef MSM8992ProcCpuInfo = R"(
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Processor : AArch64 Processor rev 3 (aarch64)
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processor : 0
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processor : 1
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processor : 2
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processor : 3
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processor : 4
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processor : 5
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Features : fp asimd evtstrm aes pmull sha1 sha2 crc32
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CPU implementer : 0x41
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CPU architecture: 8
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CPU variant : 0x0
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CPU part : 0xd03
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CPU revision : 3
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Hardware : Qualcomm Technologies, Inc MSM8992
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)";
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EXPECT_EQ(sys::detail::getHostCPUNameForARM(MSM8992ProcCpuInfo),
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"cortex-a53");
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// Exynos big.LITTLE weirdness
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const std::string ExynosProcCpuInfo = R"(
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processor : 0
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Features : fp asimd evtstrm aes pmull sha1 sha2 crc32
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CPU implementer : 0x41
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CPU architecture: 8
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CPU variant : 0x0
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CPU part : 0xd05
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processor : 1
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Features : fp asimd evtstrm aes pmull sha1 sha2 crc32
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CPU implementer : 0x53
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CPU architecture: 8
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)";
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// Verify default for Exynos.
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EXPECT_EQ(sys::detail::getHostCPUNameForARM(ExynosProcCpuInfo +
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"CPU variant : 0xc\n"
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"CPU part : 0xafe"),
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"exynos-m3");
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// Verify Exynos M3.
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EXPECT_EQ(sys::detail::getHostCPUNameForARM(ExynosProcCpuInfo +
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"CPU variant : 0x1\n"
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"CPU part : 0x002"),
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"exynos-m3");
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// Verify Exynos M4.
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EXPECT_EQ(sys::detail::getHostCPUNameForARM(ExynosProcCpuInfo +
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"CPU variant : 0x1\n"
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"CPU part : 0x003"),
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"exynos-m4");
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const std::string ThunderX2T99ProcCpuInfo = R"(
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processor : 0
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BogoMIPS : 400.00
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Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 atomics
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CPU implementer : 0x43
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CPU architecture: 8
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CPU variant : 0x1
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CPU part : 0x0af
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)";
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// Verify different versions of ThunderX2T99.
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EXPECT_EQ(sys::detail::getHostCPUNameForARM(ThunderX2T99ProcCpuInfo +
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"CPU implementer : 0x42\n"
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"CPU part : 0x516"),
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"thunderx2t99");
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EXPECT_EQ(sys::detail::getHostCPUNameForARM(ThunderX2T99ProcCpuInfo +
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"CPU implementer : 0x42\n"
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"CPU part : 0x0516"),
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"thunderx2t99");
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EXPECT_EQ(sys::detail::getHostCPUNameForARM(ThunderX2T99ProcCpuInfo +
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"CPU implementer : 0x43\n"
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"CPU part : 0x516"),
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"thunderx2t99");
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EXPECT_EQ(sys::detail::getHostCPUNameForARM(ThunderX2T99ProcCpuInfo +
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"CPU implementer : 0x43\n"
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"CPU part : 0x0516"),
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"thunderx2t99");
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EXPECT_EQ(sys::detail::getHostCPUNameForARM(ThunderX2T99ProcCpuInfo +
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"CPU implementer : 0x42\n"
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"CPU part : 0xaf"),
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"thunderx2t99");
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EXPECT_EQ(sys::detail::getHostCPUNameForARM(ThunderX2T99ProcCpuInfo +
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"CPU implementer : 0x42\n"
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"CPU part : 0x0af"),
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"thunderx2t99");
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EXPECT_EQ(sys::detail::getHostCPUNameForARM(ThunderX2T99ProcCpuInfo +
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"CPU implementer : 0x43\n"
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"CPU part : 0xaf"),
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"thunderx2t99");
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EXPECT_EQ(sys::detail::getHostCPUNameForARM(ThunderX2T99ProcCpuInfo +
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"CPU implementer : 0x43\n"
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"CPU part : 0x0af"),
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"thunderx2t99");
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// Verify ThunderXT88.
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const std::string ThunderXT88ProcCpuInfo = R"(
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processor : 0
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BogoMIPS : 200.00
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Features : fp asimd evtstrm aes pmull sha1 sha2 crc32
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CPU implementer : 0x43
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CPU architecture: 8
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CPU variant : 0x1
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CPU part : 0x0a1
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)";
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EXPECT_EQ(sys::detail::getHostCPUNameForARM(ThunderXT88ProcCpuInfo +
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"CPU implementer : 0x43\n"
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"CPU part : 0x0a1"),
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"thunderxt88");
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EXPECT_EQ(sys::detail::getHostCPUNameForARM(ThunderXT88ProcCpuInfo +
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"CPU implementer : 0x43\n"
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"CPU part : 0xa1"),
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"thunderxt88");
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// Verify HiSilicon processors.
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EXPECT_EQ(sys::detail::getHostCPUNameForARM("CPU implementer : 0x48\n"
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"CPU part : 0xd01"),
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"tsv110");
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// Verify A64FX.
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const std::string A64FXProcCpuInfo = R"(
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processor : 0
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BogoMIPS : 200.00
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Features : fp asimd evtstrm sha1 sha2 crc32 atomics fphp asimdhp cpuid asimdrdm fcma dcpop sve
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CPU implementer : 0x46
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CPU architecture: 8
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CPU variant : 0x1
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CPU part : 0x001
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)";
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EXPECT_EQ(sys::detail::getHostCPUNameForARM(A64FXProcCpuInfo), "a64fx");
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// Verify Nvidia Carmel.
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const std::string CarmelProcCpuInfo = R"(
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processor : 0
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model name : ARMv8 Processor rev 0 (v8l)
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BogoMIPS : 62.50
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Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 atomics fphp asimdhp cpuid asimdrdm dcpop
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CPU implementer : 0x4e
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CPU architecture: 8
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CPU variant : 0x0
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CPU part : 0x004
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CPU revision : 0
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)";
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EXPECT_EQ(sys::detail::getHostCPUNameForARM(CarmelProcCpuInfo), "carmel");
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EXPECT_EQ(sys::detail::getHostCPUNameForARM("CPU implementer : 0x4e\n"
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"CPU part : 0x10"),
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"olympus");
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EXPECT_EQ(sys::detail::getHostCPUNameForARM("CPU implementer : 0x4e\n"
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"CPU part : 0x010"),
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"olympus");
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// Snapdragon mixed implementer quirk
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const std::string Snapdragon865ProcCPUInfo = R"(
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processor : 0
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BogoMIPS : 38.40
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Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 atomics fphp asimdhp cpuid asimdrdm lrcpc dcpop asimddp
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CPU implementer : 0x51
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CPU architecture: 8
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CPU variant : 0xd
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CPU part : 0x805
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CPU revision : 14
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processor : 1
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processor : 2
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processor : 3
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processor : 4
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processor : 5
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processor : 6
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BogoMIPS : 38.40
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Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 atomics fphp asimdhp cpuid asimdrdm lrcpc dcpop asimddp
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CPU implementer : 0x41
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CPU architecture: 8
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CPU variant : 0x1
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CPU part : 0xd0d
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CPU revision : 0
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)";
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EXPECT_EQ(sys::detail::getHostCPUNameForARM(Snapdragon865ProcCPUInfo), "cortex-a77");
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}
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TEST(getLinuxHostCPUName, s390x) {
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SmallVector<std::string> ModelIDs(
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{"9175", "3931", "8561", "3906", "2964", "2827", "2817", "2097", "2064"});
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SmallVector<std::string> VectorSupport({"", "vx"});
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SmallVector<StringRef> ExpectedCPUs;
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// Model Id: 9175
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ExpectedCPUs.push_back("zEC12");
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ExpectedCPUs.push_back("z17");
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// Model Id: 3931
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ExpectedCPUs.push_back("zEC12");
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ExpectedCPUs.push_back("z16");
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// Model Id: 8561
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ExpectedCPUs.push_back("zEC12");
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ExpectedCPUs.push_back("z15");
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// Model Id: 3906
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ExpectedCPUs.push_back("zEC12");
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ExpectedCPUs.push_back("z14");
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// Model Id: 2964
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ExpectedCPUs.push_back("zEC12");
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ExpectedCPUs.push_back("z13");
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// Model Id: 2827
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ExpectedCPUs.push_back("zEC12");
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ExpectedCPUs.push_back("zEC12");
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// Model Id: 2817
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ExpectedCPUs.push_back("z196");
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ExpectedCPUs.push_back("z196");
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// Model Id: 2097
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ExpectedCPUs.push_back("z10");
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ExpectedCPUs.push_back("z10");
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// Model Id: 2064
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ExpectedCPUs.push_back("generic");
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ExpectedCPUs.push_back("generic");
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const std::string DummyBaseVectorInfo =
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"features : esan3 zarch stfle msa ldisp eimm dfp edat etf3eh highgprs "
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"te ";
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const std::string DummyBaseMachineInfo =
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"processor 0: version = FF, identification = 059C88, machine = ";
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int CheckIndex = 0;
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for (size_t I = 0; I < ModelIDs.size(); I++) {
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for (size_t J = 0; J < VectorSupport.size(); J++) {
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const std::string DummyCPUInfo = DummyBaseVectorInfo + VectorSupport[J] +
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"\n" + DummyBaseMachineInfo +
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ModelIDs[I];
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EXPECT_EQ(sys::detail::getHostCPUNameForS390x(DummyCPUInfo),
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ExpectedCPUs[CheckIndex++]);
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}
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}
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}
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TEST(getLinuxHostCPUName, RISCV) {
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const StringRef SifiveU74MCProcCPUInfo = R"(
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processor : 0
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hart : 2
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isa : rv64imafdc
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mmu : sv39
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uarch : sifive,u74-mc
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)";
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EXPECT_EQ(sys::detail::getHostCPUNameForRISCV(SifiveU74MCProcCPUInfo),
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"sifive-u74");
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EXPECT_EQ(
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sys::detail::getHostCPUNameForRISCV("uarch : sifive,bullet0\n"),
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"sifive-u74");
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const StringRef SifiveP550MCProcCPUInfo = R"(
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processor : 0
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hart : 2
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isa : rv64imafdch_zicsr_zifencei_zba_zbb_sscofpmf
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mmu : sv48
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uarch : eswin,eic770x
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)";
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EXPECT_EQ(sys::detail::getHostCPUNameForRISCV(SifiveP550MCProcCPUInfo),
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"sifive-p550");
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EXPECT_EQ(
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sys::detail::getHostCPUNameForRISCV("uarch : eswin,eic770x\n"),
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"sifive-p550");
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}
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static bool runAndGetCommandOutput(
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const char *ExePath, ArrayRef<llvm::StringRef> argv,
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std::unique_ptr<char[]> &Buffer, off_t &Size) {
|
|
bool Success = false;
|
|
[ExePath, argv, &Buffer, &Size, &Success] {
|
|
using namespace llvm::sys;
|
|
SmallString<128> TestDirectory;
|
|
ASSERT_NO_ERROR(fs::createUniqueDirectory("host_test", TestDirectory));
|
|
|
|
SmallString<128> OutputFile(TestDirectory);
|
|
path::append(OutputFile, "out");
|
|
StringRef OutputPath = OutputFile.str();
|
|
|
|
const std::optional<StringRef> Redirects[] = {
|
|
/*STDIN=*/std::nullopt, /*STDOUT=*/OutputPath, /*STDERR=*/std::nullopt};
|
|
int RetCode =
|
|
ExecuteAndWait(ExePath, argv, /*env=*/std::nullopt, Redirects);
|
|
ASSERT_EQ(0, RetCode);
|
|
|
|
int FD = 0;
|
|
ASSERT_NO_ERROR(fs::openFileForRead(OutputPath, FD));
|
|
Size = ::lseek(FD, 0, SEEK_END);
|
|
ASSERT_NE(-1, Size);
|
|
::lseek(FD, 0, SEEK_SET);
|
|
Buffer = std::make_unique<char[]>(Size);
|
|
ASSERT_EQ(::read(FD, Buffer.get(), Size), Size);
|
|
::close(FD);
|
|
|
|
ASSERT_NO_ERROR(fs::remove(OutputPath));
|
|
ASSERT_NO_ERROR(fs::remove(TestDirectory.str()));
|
|
Success = true;
|
|
}();
|
|
return Success;
|
|
}
|
|
|
|
TEST(HostTest, DummyRunAndGetCommandOutputUse) {
|
|
// Suppress defined-but-not-used warnings when the tests using the helper are
|
|
// disabled.
|
|
(void)&runAndGetCommandOutput;
|
|
}
|
|
|
|
TEST(HostTest, getMacOSHostVersion) {
|
|
llvm::Triple HostTriple(llvm::sys::getProcessTriple());
|
|
if (!HostTriple.isMacOSX())
|
|
GTEST_SKIP();
|
|
|
|
const char *SwVersPath = "/usr/bin/sw_vers";
|
|
StringRef argv[] = {SwVersPath, "-productVersion"};
|
|
std::unique_ptr<char[]> Buffer;
|
|
off_t Size;
|
|
ASSERT_EQ(runAndGetCommandOutput(SwVersPath, argv, Buffer, Size), true);
|
|
StringRef SystemVersionStr = StringRef(Buffer.get(), Size).rtrim();
|
|
|
|
// Ensure that the two versions match.
|
|
VersionTuple SystemVersion;
|
|
ASSERT_EQ(llvm::Triple((Twine("x86_64-apple-macos") + SystemVersionStr))
|
|
.getMacOSXVersion(SystemVersion),
|
|
true);
|
|
VersionTuple HostVersion;
|
|
ASSERT_EQ(HostTriple.getMacOSXVersion(HostVersion), true);
|
|
|
|
if (SystemVersion.getMajor() > 10) {
|
|
// Don't compare the 'Minor' and 'Micro' versions, as they're always '0' for
|
|
// the 'Darwin' triples on 11.x.
|
|
ASSERT_EQ(SystemVersion.getMajor(), HostVersion.getMajor());
|
|
} else {
|
|
// Don't compare the 'Micro' version, as it's always '0' for the 'Darwin'
|
|
// triples.
|
|
ASSERT_EQ(SystemVersion.getMajor(), HostVersion.getMajor());
|
|
ASSERT_EQ(SystemVersion.getMinor(), HostVersion.getMinor());
|
|
}
|
|
}
|
|
|
|
// Helper to return AIX system version. Must return void to use ASSERT_*.
|
|
static void getAIXSystemVersion(VersionTuple &SystemVersion) {
|
|
const char *ExePath = "/usr/bin/oslevel";
|
|
StringRef argv[] = {ExePath};
|
|
std::unique_ptr<char[]> Buffer;
|
|
off_t Size;
|
|
ASSERT_EQ(runAndGetCommandOutput(ExePath, argv, Buffer, Size), true);
|
|
StringRef SystemVersionStr = StringRef(Buffer.get(), Size).rtrim();
|
|
|
|
SystemVersion =
|
|
llvm::Triple((Twine("powerpc-ibm-aix") + SystemVersionStr))
|
|
.getOSVersion();
|
|
}
|
|
|
|
TEST(HostTest, AIXHostVersionDetect) {
|
|
llvm::Triple HostTriple(llvm::sys::getProcessTriple());
|
|
if (HostTriple.getOS() != Triple::AIX)
|
|
GTEST_SKIP();
|
|
|
|
llvm::Triple ConfiguredHostTriple(LLVM_HOST_TRIPLE);
|
|
ASSERT_EQ(ConfiguredHostTriple.getOS(), Triple::AIX);
|
|
|
|
VersionTuple SystemVersion;
|
|
getAIXSystemVersion(SystemVersion);
|
|
|
|
// Ensure that the host triple version (major) and release (minor) numbers,
|
|
// unless explicitly configured, match with those of the current system.
|
|
auto SysMajor = SystemVersion.getMajor();
|
|
auto SysMinor = SystemVersion.getMinor();
|
|
VersionTuple HostVersion = HostTriple.getOSVersion();
|
|
if (ConfiguredHostTriple.getOSMajorVersion()) {
|
|
// Explicitly configured, force a match. We do it this way so the
|
|
// asserts are always executed.
|
|
SysMajor = HostVersion.getMajor();
|
|
SysMinor = HostVersion.getMinor();
|
|
}
|
|
ASSERT_EQ(SysMajor, HostVersion.getMajor());
|
|
ASSERT_EQ(SysMinor, HostVersion.getMinor());
|
|
}
|
|
|
|
TEST(HostTest, AIXTargetVersionDetect) {
|
|
llvm::Triple TargetTriple(llvm::sys::getDefaultTargetTriple());
|
|
if (TargetTriple.getOS() != Triple::AIX)
|
|
GTEST_SKIP();
|
|
|
|
// Ensure that the target triple version (major) and release (minor) numbers
|
|
// match with those of the current system.
|
|
llvm::Triple ConfiguredTargetTriple(LLVM_DEFAULT_TARGET_TRIPLE);
|
|
if (ConfiguredTargetTriple.getOSMajorVersion())
|
|
GTEST_SKIP(); // The version was configured explicitly; skip.
|
|
|
|
VersionTuple SystemVersion;
|
|
getAIXSystemVersion(SystemVersion);
|
|
VersionTuple TargetVersion = TargetTriple.getOSVersion();
|
|
ASSERT_EQ(SystemVersion.getMajor(), TargetVersion.getMajor());
|
|
ASSERT_EQ(SystemVersion.getMinor(), TargetVersion.getMinor());
|
|
}
|
|
|
|
TEST(HostTest, AIXHostCPUDetect) {
|
|
llvm::Triple HostTriple(llvm::sys::getProcessTriple());
|
|
if (HostTriple.getOS() != Triple::AIX)
|
|
GTEST_SKIP();
|
|
|
|
// Return a value based on the current processor implementation mode.
|
|
const char *ExePath = "/usr/sbin/getsystype";
|
|
StringRef argv[] = {ExePath, "-i"};
|
|
std::unique_ptr<char[]> Buffer;
|
|
off_t Size;
|
|
ASSERT_EQ(runAndGetCommandOutput(ExePath, argv, Buffer, Size), true);
|
|
StringRef CPU(Buffer.get(), Size);
|
|
StringRef MCPU = StringSwitch<const char *>(CPU)
|
|
.Case("POWER 4\n", "pwr4")
|
|
.Case("POWER 5\n", "pwr5")
|
|
.Case("POWER 6\n", "pwr6")
|
|
.Case("POWER 7\n", "pwr7")
|
|
.Case("POWER 8\n", "pwr8")
|
|
.Case("POWER 9\n", "pwr9")
|
|
.Case("POWER 10\n", "pwr10")
|
|
.Case("POWER 11\n", "pwr11")
|
|
.Default("unknown");
|
|
|
|
StringRef HostCPU = sys::getHostCPUName();
|
|
|
|
// Just do the comparison on the base implementation mode.
|
|
if (HostCPU == "970")
|
|
HostCPU = StringRef("pwr4");
|
|
else
|
|
HostCPU = HostCPU.rtrim('x');
|
|
|
|
EXPECT_EQ(HostCPU, MCPU);
|
|
}
|