vasilito
cb424d7448
verify-patch-sanity.py validates every active recipe .patch has internally- consistent hunk line counts — catching the 'malformed patch at line N' failure at commit/CI/preflight time instead of hours into a cook. This cycle hit that class three times (qtwaylandscanner, sddm, xwayland), each only discovered when cookbook tried to apply the patch. Running it across the repo found 29 latent malformed patches (validated against GNU patch: e.g. relibc/P3-sysv-ipc reproduces 'malformed patch at line 22'). They were harmless only because they sit in vendored recipes (baked, not re- applied) — but would fail on any version-bump re-derivation. --fix recounts the hunk headers (body untouched) and repaired all 29. Wired into build-preflight.sh (Phase 1.0D) and redbear-ci.yml, with a unit test (test-patch-sanity.sh). Skips archived/legacy trees and unvalidatable formats (empty placeholders, bare-@@ git hunks).
110 lines
3.7 KiB
TableGen
110 lines
3.7 KiB
TableGen
// RUN: llvm-tblgen -gen-emitter -I %p/../../include %s | FileCheck %s
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// Check if VarLenCodeEmitterGen works correctly.
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include "llvm/Target/Target.td"
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def ArchInstrInfo : InstrInfo { }
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def Arch : Target {
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let InstructionSet = ArchInstrInfo;
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}
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def Reg : Register<"reg">;
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def RegClass : RegisterClass<"foo", [i64], 0, (add Reg)>;
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def GR64 : RegisterOperand<RegClass>;
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class MyMemOperand<dag sub_ops> : Operand<iPTR> {
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let MIOperandInfo = sub_ops;
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dag Base;
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dag Extension;
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}
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class MyVarInst<MyMemOperand memory_op> : Instruction {
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dag Inst;
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let OutOperandList = (outs GR64:$dst);
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let InOperandList = (ins memory_op:$src);
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// Testing `ascend` and `descend`
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let Inst = (ascend
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(descend 0b10110111, memory_op.Base),
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memory_op.Extension,
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// Testing operand referencing.
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(operand "$dst", 4),
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// Testing operand referencing with a certain bit range.
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(slice "$dst", 3, 1),
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// Testing slice hi/lo swap.
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(slice "$dst", 1, 3),
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// Testing custom encoder
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(operand "$dst", 2, (encoder "myCustomEncoder"))
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);
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}
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class MemOp16<string op_name> : MyMemOperand<(ops GR64:$reg, i16imm:$offset)> {
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// Testing sub-operand referencing.
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let Base = (operand "$"#op_name#".reg", 8);
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let Extension = (operand "$"#op_name#".offset", 16);
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}
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class MemOp32<string op_name> : MyMemOperand<(ops GR64:$reg, i32imm:$offset)> {
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let Base = (operand "$"#op_name#".reg", 8);
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// Testing variable-length instruction encoding.
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let Extension = (operand "$"#op_name#".offset", 32);
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}
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def FOO16 : MyVarInst<MemOp16<"src">>;
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def FOO32 : MyVarInst<MemOp32<"src">>;
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// The fixed bits part
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// CHECK: {/*NumBits*/44,
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// CHECK-SAME: // FOO16
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// CHECK: {/*NumBits*/60,
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// CHECK-SAME: // FOO32
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// CHECK: UINT64_C(46848), // FOO16
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// CHECK: UINT64_C(46848), // FOO32
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// CHECK-LABEL: case ::FOO16: {
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// CHECK: Scratch.getBitWidth() < 16
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// src.reg
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// CHECK: getMachineOpValue(MI, MI.getOperand(1), /*Pos=*/0, Scratch, Fixups, STI);
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// CHECK: Inst.insertBits(Scratch.extractBits(8, 0), 0);
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// src.offset
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// CHECK: getMachineOpValue(MI, MI.getOperand(2), /*Pos=*/16, Scratch, Fixups, STI);
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// CHECK: Inst.insertBits(Scratch.extractBits(16, 0), 16);
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// 1st dst
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// CHECK: getMachineOpValue(MI, MI.getOperand(0), /*Pos=*/32, Scratch, Fixups, STI);
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// CHECK: Inst.insertBits(Scratch.extractBits(4, 0), 32);
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// 2nd dst
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// CHECK: getMachineOpValue(MI, MI.getOperand(0), /*Pos=*/36, Scratch, Fixups, STI);
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// CHECK: Inst.insertBits(Scratch.extractBits(3, 1), 36);
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// Slice hi/lo swap
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// CHECK: getMachineOpValue(MI, MI.getOperand(0), /*Pos=*/39, Scratch, Fixups, STI);
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// CHECK: Inst.insertBits(Scratch.extractBits(3, 1), 39);
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// dst w/ custom encoder
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// CHECK: myCustomEncoder(MI, /*OpIdx=*/0, /*Pos=*/42, Scratch, Fixups, STI);
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// CHECK: Inst.insertBits(Scratch.extractBits(2, 0), 42);
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// CHECK-LABEL: case ::FOO32: {
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// CHECK: Scratch.getBitWidth() < 32
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// src.reg
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// CHECK: getMachineOpValue(MI, MI.getOperand(1), /*Pos=*/0, Scratch, Fixups, STI);
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// CHECK: Inst.insertBits(Scratch.extractBits(8, 0), 0);
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// src.offset
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// CHECK: getMachineOpValue(MI, MI.getOperand(2), /*Pos=*/16, Scratch, Fixups, STI);
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// CHECK: Inst.insertBits(Scratch.extractBits(32, 0), 16);
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// 1st dst
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// CHECK: getMachineOpValue(MI, MI.getOperand(0), /*Pos=*/48, Scratch, Fixups, STI);
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// CHECK: Inst.insertBits(Scratch.extractBits(4, 0), 48);
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// 2nd dst
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// CHECK: getMachineOpValue(MI, MI.getOperand(0), /*Pos=*/52, Scratch, Fixups, STI);
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// CHECK: Inst.insertBits(Scratch.extractBits(3, 1), 52);
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// Slice hi/lo swap
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// CHECK: getMachineOpValue(MI, MI.getOperand(0), /*Pos=*/55, Scratch, Fixups, STI);
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// CHECK: Inst.insertBits(Scratch.extractBits(3, 1), 55);
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// dst w/ custom encoder
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// CHECK: myCustomEncoder(MI, /*OpIdx=*/0, /*Pos=*/58, Scratch, Fixups, STI);
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// CHECK: Inst.insertBits(Scratch.extractBits(2, 0), 58);
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