cb424d7448
verify-patch-sanity.py validates every active recipe .patch has internally- consistent hunk line counts — catching the 'malformed patch at line N' failure at commit/CI/preflight time instead of hours into a cook. This cycle hit that class three times (qtwaylandscanner, sddm, xwayland), each only discovered when cookbook tried to apply the patch. Running it across the repo found 29 latent malformed patches (validated against GNU patch: e.g. relibc/P3-sysv-ipc reproduces 'malformed patch at line 22'). They were harmless only because they sit in vendored recipes (baked, not re- applied) — but would fail on any version-bump re-derivation. --fix recounts the hunk headers (body untouched) and repaired all 29. Wired into build-preflight.sh (Phase 1.0D) and redbear-ci.yml, with a unit test (test-patch-sanity.sh). Skips archived/legacy trees and unvalidatable formats (empty placeholders, bare-@@ git hunks).
222 lines
6.4 KiB
C++
222 lines
6.4 KiB
C++
//===- AMDGPU.cpp ---------------------------------------------------------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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#include "InputFiles.h"
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#include "Symbols.h"
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#include "Target.h"
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#include "lld/Common/ErrorHandler.h"
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#include "llvm/BinaryFormat/ELF.h"
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#include "llvm/Support/Endian.h"
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using namespace llvm;
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using namespace llvm::object;
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using namespace llvm::support::endian;
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using namespace llvm::ELF;
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using namespace lld;
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using namespace lld::elf;
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namespace {
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class AMDGPU final : public TargetInfo {
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private:
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uint32_t calcEFlagsV3() const;
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uint32_t calcEFlagsV4() const;
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uint32_t calcEFlagsV6() const;
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public:
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AMDGPU(Ctx &);
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uint32_t calcEFlags() const override;
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void relocate(uint8_t *loc, const Relocation &rel,
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uint64_t val) const override;
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RelExpr getRelExpr(RelType type, const Symbol &s,
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const uint8_t *loc) const override;
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RelType getDynRel(RelType type) const override;
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int64_t getImplicitAddend(const uint8_t *buf, RelType type) const override;
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};
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} // namespace
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AMDGPU::AMDGPU(Ctx &ctx) : TargetInfo(ctx) {
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relativeRel = R_AMDGPU_RELATIVE64;
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gotRel = R_AMDGPU_ABS64;
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symbolicRel = R_AMDGPU_ABS64;
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}
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static uint32_t getEFlags(InputFile *file) {
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return cast<ObjFile<ELF64LE>>(file)->getObj().getHeader().e_flags;
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}
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uint32_t AMDGPU::calcEFlagsV3() const {
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uint32_t ret = getEFlags(ctx.objectFiles[0]);
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// Verify that all input files have the same e_flags.
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for (InputFile *f : ArrayRef(ctx.objectFiles).slice(1)) {
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if (ret == getEFlags(f))
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continue;
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ErrAlways(ctx) << "incompatible e_flags: " << f;
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return 0;
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}
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return ret;
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}
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uint32_t AMDGPU::calcEFlagsV4() const {
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uint32_t retMach = getEFlags(ctx.objectFiles[0]) & EF_AMDGPU_MACH;
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uint32_t retXnack =
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getEFlags(ctx.objectFiles[0]) & EF_AMDGPU_FEATURE_XNACK_V4;
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uint32_t retSramEcc =
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getEFlags(ctx.objectFiles[0]) & EF_AMDGPU_FEATURE_SRAMECC_V4;
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// Verify that all input files have compatible e_flags (same mach, all
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// features in the same category are either ANY, ANY and ON, or ANY and OFF).
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for (InputFile *f : ArrayRef(ctx.objectFiles).slice(1)) {
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if (retMach != (getEFlags(f) & EF_AMDGPU_MACH)) {
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Err(ctx) << "incompatible mach: " << f;
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return 0;
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}
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if (retXnack == EF_AMDGPU_FEATURE_XNACK_UNSUPPORTED_V4 ||
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(retXnack != EF_AMDGPU_FEATURE_XNACK_ANY_V4 &&
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(getEFlags(f) & EF_AMDGPU_FEATURE_XNACK_V4)
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!= EF_AMDGPU_FEATURE_XNACK_ANY_V4)) {
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if (retXnack != (getEFlags(f) & EF_AMDGPU_FEATURE_XNACK_V4)) {
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Err(ctx) << "incompatible xnack: " << f;
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return 0;
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}
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} else {
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if (retXnack == EF_AMDGPU_FEATURE_XNACK_ANY_V4)
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retXnack = getEFlags(f) & EF_AMDGPU_FEATURE_XNACK_V4;
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}
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if (retSramEcc == EF_AMDGPU_FEATURE_SRAMECC_UNSUPPORTED_V4 ||
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(retSramEcc != EF_AMDGPU_FEATURE_SRAMECC_ANY_V4 &&
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(getEFlags(f) & EF_AMDGPU_FEATURE_SRAMECC_V4) !=
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EF_AMDGPU_FEATURE_SRAMECC_ANY_V4)) {
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if (retSramEcc != (getEFlags(f) & EF_AMDGPU_FEATURE_SRAMECC_V4)) {
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Err(ctx) << "incompatible sramecc: " << f;
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return 0;
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}
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} else {
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if (retSramEcc == EF_AMDGPU_FEATURE_SRAMECC_ANY_V4)
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retSramEcc = getEFlags(f) & EF_AMDGPU_FEATURE_SRAMECC_V4;
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}
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}
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return retMach | retXnack | retSramEcc;
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}
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uint32_t AMDGPU::calcEFlagsV6() const {
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uint32_t flags = calcEFlagsV4();
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uint32_t genericVersion =
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getEFlags(ctx.objectFiles[0]) & EF_AMDGPU_GENERIC_VERSION;
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// Verify that all input files have compatible generic version.
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for (InputFile *f : ArrayRef(ctx.objectFiles).slice(1)) {
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if (genericVersion != (getEFlags(f) & EF_AMDGPU_GENERIC_VERSION)) {
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ErrAlways(ctx) << "incompatible generic version: " << f;
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return 0;
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}
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}
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flags |= genericVersion;
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return flags;
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}
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uint32_t AMDGPU::calcEFlags() const {
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if (ctx.objectFiles.empty())
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return 0;
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uint8_t abiVersion = cast<ObjFile<ELF64LE>>(ctx.objectFiles[0])
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->getObj()
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.getHeader()
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.e_ident[EI_ABIVERSION];
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switch (abiVersion) {
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case ELFABIVERSION_AMDGPU_HSA_V2:
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case ELFABIVERSION_AMDGPU_HSA_V3:
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return calcEFlagsV3();
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case ELFABIVERSION_AMDGPU_HSA_V4:
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case ELFABIVERSION_AMDGPU_HSA_V5:
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return calcEFlagsV4();
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case ELFABIVERSION_AMDGPU_HSA_V6:
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return calcEFlagsV6();
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default:
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Err(ctx) << "unknown abi version: " << abiVersion;
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return 0;
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}
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}
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void AMDGPU::relocate(uint8_t *loc, const Relocation &rel, uint64_t val) const {
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switch (rel.type) {
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case R_AMDGPU_ABS32:
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case R_AMDGPU_GOTPCREL:
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case R_AMDGPU_GOTPCREL32_LO:
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case R_AMDGPU_REL32:
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case R_AMDGPU_REL32_LO:
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write32le(loc, val);
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break;
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case R_AMDGPU_ABS64:
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case R_AMDGPU_REL64:
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write64le(loc, val);
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break;
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case R_AMDGPU_GOTPCREL32_HI:
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case R_AMDGPU_REL32_HI:
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write32le(loc, val >> 32);
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break;
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case R_AMDGPU_REL16: {
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int64_t simm = (static_cast<int64_t>(val) - 4) / 4;
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checkInt(ctx, loc, simm, 16, rel);
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write16le(loc, simm);
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break;
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}
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default:
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llvm_unreachable("unknown relocation");
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}
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}
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RelExpr AMDGPU::getRelExpr(RelType type, const Symbol &s,
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const uint8_t *loc) const {
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switch (type) {
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case R_AMDGPU_ABS32:
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case R_AMDGPU_ABS64:
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return R_ABS;
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case R_AMDGPU_REL32:
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case R_AMDGPU_REL32_LO:
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case R_AMDGPU_REL32_HI:
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case R_AMDGPU_REL64:
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case R_AMDGPU_REL16:
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return R_PC;
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case R_AMDGPU_GOTPCREL:
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case R_AMDGPU_GOTPCREL32_LO:
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case R_AMDGPU_GOTPCREL32_HI:
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return R_GOT_PC;
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default:
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Err(ctx) << getErrorLoc(ctx, loc) << "unknown relocation (" << type.v
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<< ") against symbol " << &s;
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return R_NONE;
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}
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}
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RelType AMDGPU::getDynRel(RelType type) const {
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if (type == R_AMDGPU_ABS64)
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return type;
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return R_AMDGPU_NONE;
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}
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int64_t AMDGPU::getImplicitAddend(const uint8_t *buf, RelType type) const {
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switch (type) {
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case R_AMDGPU_NONE:
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return 0;
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case R_AMDGPU_ABS64:
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case R_AMDGPU_RELATIVE64:
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return read64(ctx, buf);
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default:
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InternalErr(ctx, buf) << "cannot read addend for relocation " << type;
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return 0;
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}
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}
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void elf::setAMDGPUTargetInfo(Ctx &ctx) { ctx.target.reset(new AMDGPU(ctx)); }
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