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RedBear-OS/local/recipes/dev/libclc/source/clang/test/CodeGen/builtins-bitint.c
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vasilito cb424d7448 build: static patch-sanity linter (shift-left the malformed-patch class) 
verify-patch-sanity.py validates every active recipe .patch has internally-
consistent hunk line counts — catching the 'malformed patch at line N' failure
at commit/CI/preflight time instead of hours into a cook. This cycle hit that
class three times (qtwaylandscanner, sddm, xwayland), each only discovered when
cookbook tried to apply the patch.

Running it across the repo found 29 latent malformed patches (validated against
GNU patch: e.g. relibc/P3-sysv-ipc reproduces 'malformed patch at line 22').
They were harmless only because they sit in vendored recipes (baked, not re-
applied) — but would fail on any version-bump re-derivation. --fix recounts the
hunk headers (body untouched) and repaired all 29.

Wired into build-preflight.sh (Phase 1.0D) and redbear-ci.yml, with a unit test
(test-patch-sanity.sh). Skips archived/legacy trees and unvalidatable formats
(empty placeholders, bare-@@ git hunks).
2026-08-01 05:13:02 +03:00

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// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 4
// RUN: %clang_cc1 -triple arm-unknown-unknown -O0 -std=c23 -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK-O0
// RUN: %clang_cc1 -triple arm-unknown-unknown -O1 -std=c23 -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK-O1
// Verify that the result from the intrinsic call is zero extended to avoid that
// we get a negative result from popcountg/ctzg/clzg.
// CHECK-O0-LABEL: define dso_local arm_aapcscc i32 @test_popcountg_ubi1(
// CHECK-O0-SAME: ) #[[ATTR0:[0-9]+]] {
// CHECK-O0-NEXT: entry:
// CHECK-O0-NEXT: [[A:%.*]] = alloca i8, align 1
// CHECK-O0-NEXT: store i8 1, ptr [[A]], align 1
// CHECK-O0-NEXT: [[TMP0:%.*]] = load i8, ptr [[A]], align 1
// CHECK-O0-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP0]] to i1
// CHECK-O0-NEXT: [[TMP1:%.*]] = call i1 @llvm.ctpop.i1(i1 [[LOADEDV]])
// CHECK-O0-NEXT: [[CAST:%.*]] = zext i1 [[TMP1]] to i32
// CHECK-O0-NEXT: ret i32 [[CAST]]
//
// CHECK-O1-LABEL: define dso_local arm_aapcscc noundef i32 @test_popcountg_ubi1(
// CHECK-O1-SAME: ) local_unnamed_addr #[[ATTR0:[0-9]+]] {
// CHECK-O1-NEXT: entry:
// CHECK-O1-NEXT: ret i32 1
//
int test_popcountg_ubi1() {
unsigned _BitInt(1) a = 1uwb;
return __builtin_popcountg(a);
}
// CHECK-O0-LABEL: define dso_local arm_aapcscc i32 @test_popcountg_ubi2(
// CHECK-O0-SAME: ) #[[ATTR0]] {
// CHECK-O0-NEXT: entry:
// CHECK-O0-NEXT: [[A:%.*]] = alloca i8, align 1
// CHECK-O0-NEXT: store i8 3, ptr [[A]], align 1
// CHECK-O0-NEXT: [[TMP0:%.*]] = load i8, ptr [[A]], align 1
// CHECK-O0-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP0]] to i2
// CHECK-O0-NEXT: [[TMP1:%.*]] = call i2 @llvm.ctpop.i2(i2 [[LOADEDV]])
// CHECK-O0-NEXT: [[CAST:%.*]] = zext i2 [[TMP1]] to i32
// CHECK-O0-NEXT: ret i32 [[CAST]]
//
// CHECK-O1-LABEL: define dso_local arm_aapcscc noundef i32 @test_popcountg_ubi2(
// CHECK-O1-SAME: ) local_unnamed_addr #[[ATTR0]] {
// CHECK-O1-NEXT: entry:
// CHECK-O1-NEXT: ret i32 2
//
int test_popcountg_ubi2() {
unsigned _BitInt(2) a = 3uwb;
return __builtin_popcountg(a);
}
// CHECK-O0-LABEL: define dso_local arm_aapcscc i32 @test_ctzg_ubi1(
// CHECK-O0-SAME: ) #[[ATTR0]] {
// CHECK-O0-NEXT: entry:
// CHECK-O0-NEXT: [[A:%.*]] = alloca i8, align 1
// CHECK-O0-NEXT: store i8 0, ptr [[A]], align 1
// CHECK-O0-NEXT: [[TMP0:%.*]] = load i8, ptr [[A]], align 1
// CHECK-O0-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP0]] to i1
// CHECK-O0-NEXT: [[TMP1:%.*]] = call i1 @llvm.cttz.i1(i1 [[LOADEDV]], i1 false)
// CHECK-O0-NEXT: [[CAST:%.*]] = zext i1 [[TMP1]] to i32
// CHECK-O0-NEXT: ret i32 [[CAST]]
//
// CHECK-O1-LABEL: define dso_local arm_aapcscc noundef i32 @test_ctzg_ubi1(
// CHECK-O1-SAME: ) local_unnamed_addr #[[ATTR0]] {
// CHECK-O1-NEXT: entry:
// CHECK-O1-NEXT: ret i32 1
//
int test_ctzg_ubi1() {
unsigned _BitInt(1) a = 0uwb;
return __builtin_ctzg(a);
}
// CHECK-O0-LABEL: define dso_local arm_aapcscc i32 @test_ctzg_ubi2(
// CHECK-O0-SAME: ) #[[ATTR0]] {
// CHECK-O0-NEXT: entry:
// CHECK-O0-NEXT: [[A:%.*]] = alloca i8, align 1
// CHECK-O0-NEXT: store i8 0, ptr [[A]], align 1
// CHECK-O0-NEXT: [[TMP0:%.*]] = load i8, ptr [[A]], align 1
// CHECK-O0-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP0]] to i2
// CHECK-O0-NEXT: [[TMP1:%.*]] = call i2 @llvm.cttz.i2(i2 [[LOADEDV]], i1 false)
// CHECK-O0-NEXT: [[CAST:%.*]] = zext i2 [[TMP1]] to i32
// CHECK-O0-NEXT: ret i32 [[CAST]]
//
// CHECK-O1-LABEL: define dso_local arm_aapcscc noundef i32 @test_ctzg_ubi2(
// CHECK-O1-SAME: ) local_unnamed_addr #[[ATTR0]] {
// CHECK-O1-NEXT: entry:
// CHECK-O1-NEXT: ret i32 2
//
int test_ctzg_ubi2() {
unsigned _BitInt(2) a = 0uwb;
return __builtin_ctzg(a);
}
// CHECK-O0-LABEL: define dso_local arm_aapcscc i32 @test_clzg_ubi1(
// CHECK-O0-SAME: ) #[[ATTR0]] {
// CHECK-O0-NEXT: entry:
// CHECK-O0-NEXT: [[A:%.*]] = alloca i8, align 1
// CHECK-O0-NEXT: store i8 0, ptr [[A]], align 1
// CHECK-O0-NEXT: [[TMP0:%.*]] = load i8, ptr [[A]], align 1
// CHECK-O0-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP0]] to i1
// CHECK-O0-NEXT: [[TMP1:%.*]] = call i1 @llvm.ctlz.i1(i1 [[LOADEDV]], i1 false)
// CHECK-O0-NEXT: [[CAST:%.*]] = zext i1 [[TMP1]] to i32
// CHECK-O0-NEXT: ret i32 [[CAST]]
//
// CHECK-O1-LABEL: define dso_local arm_aapcscc noundef i32 @test_clzg_ubi1(
// CHECK-O1-SAME: ) local_unnamed_addr #[[ATTR0]] {
// CHECK-O1-NEXT: entry:
// CHECK-O1-NEXT: ret i32 1
//
int test_clzg_ubi1() {
unsigned _BitInt(1) a = 0uwb;
return __builtin_clzg(a);
}
// CHECK-O0-LABEL: define dso_local arm_aapcscc i32 @test_clzg_ubi2(
// CHECK-O0-SAME: ) #[[ATTR0]] {
// CHECK-O0-NEXT: entry:
// CHECK-O0-NEXT: [[A:%.*]] = alloca i8, align 1
// CHECK-O0-NEXT: store i8 0, ptr [[A]], align 1
// CHECK-O0-NEXT: [[TMP0:%.*]] = load i8, ptr [[A]], align 1
// CHECK-O0-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP0]] to i2
// CHECK-O0-NEXT: [[TMP1:%.*]] = call i2 @llvm.ctlz.i2(i2 [[LOADEDV]], i1 false)
// CHECK-O0-NEXT: [[CAST:%.*]] = zext i2 [[TMP1]] to i32
// CHECK-O0-NEXT: ret i32 [[CAST]]
//
// CHECK-O1-LABEL: define dso_local arm_aapcscc noundef i32 @test_clzg_ubi2(
// CHECK-O1-SAME: ) local_unnamed_addr #[[ATTR0]] {
// CHECK-O1-NEXT: entry:
// CHECK-O1-NEXT: ret i32 2
//
int test_clzg_ubi2() {
unsigned _BitInt(2) a = 0uwb;
return __builtin_clzg(a);
}
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