cb424d7448
verify-patch-sanity.py validates every active recipe .patch has internally- consistent hunk line counts — catching the 'malformed patch at line N' failure at commit/CI/preflight time instead of hours into a cook. This cycle hit that class three times (qtwaylandscanner, sddm, xwayland), each only discovered when cookbook tried to apply the patch. Running it across the repo found 29 latent malformed patches (validated against GNU patch: e.g. relibc/P3-sysv-ipc reproduces 'malformed patch at line 22'). They were harmless only because they sit in vendored recipes (baked, not re- applied) — but would fail on any version-bump re-derivation. --fix recounts the hunk headers (body untouched) and repaired all 29. Wired into build-preflight.sh (Phase 1.0D) and redbear-ci.yml, with a unit test (test-patch-sanity.sh). Skips archived/legacy trees and unvalidatable formats (empty placeholders, bare-@@ git hunks).
346 lines
16 KiB
C
346 lines
16 KiB
C
// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 5
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// RUN: %clang_cc1 %s -emit-llvm -o - -triple=aarch64-none-elf | FileCheck %s
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// REQUIRES: aarch64-registered-target
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#include <stdatomic.h>
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// CHECK-LABEL: define dso_local void @clear_relaxed(
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// CHECK-SAME: ptr noundef [[PTR:%.*]]) #[[ATTR0:[0-9]+]] {
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// CHECK-NEXT: [[ENTRY:.*:]]
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// CHECK-NEXT: [[PTR_ADDR:%.*]] = alloca ptr, align 8
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// CHECK-NEXT: store ptr [[PTR]], ptr [[PTR_ADDR]], align 8
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// CHECK-NEXT: [[TMP0:%.*]] = load ptr, ptr [[PTR_ADDR]], align 8
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// CHECK-NEXT: store atomic i8 0, ptr [[TMP0]] monotonic, align 1
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// CHECK-NEXT: ret void
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//
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void clear_relaxed(char *ptr) {
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__atomic_clear(ptr, memory_order_relaxed);
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}
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// CHECK-LABEL: define dso_local void @clear_seq_cst(
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// CHECK-SAME: ptr noundef [[PTR:%.*]]) #[[ATTR0]] {
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// CHECK-NEXT: [[ENTRY:.*:]]
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// CHECK-NEXT: [[PTR_ADDR:%.*]] = alloca ptr, align 8
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// CHECK-NEXT: store ptr [[PTR]], ptr [[PTR_ADDR]], align 8
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// CHECK-NEXT: [[TMP0:%.*]] = load ptr, ptr [[PTR_ADDR]], align 8
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// CHECK-NEXT: store atomic i8 0, ptr [[TMP0]] seq_cst, align 1
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// CHECK-NEXT: ret void
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//
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void clear_seq_cst(char *ptr) {
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__atomic_clear(ptr, memory_order_seq_cst);
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}
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// CHECK-LABEL: define dso_local void @clear_release(
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// CHECK-SAME: ptr noundef [[PTR:%.*]]) #[[ATTR0]] {
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// CHECK-NEXT: [[ENTRY:.*:]]
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// CHECK-NEXT: [[PTR_ADDR:%.*]] = alloca ptr, align 8
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// CHECK-NEXT: store ptr [[PTR]], ptr [[PTR_ADDR]], align 8
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// CHECK-NEXT: [[TMP0:%.*]] = load ptr, ptr [[PTR_ADDR]], align 8
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// CHECK-NEXT: store atomic i8 0, ptr [[TMP0]] release, align 1
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// CHECK-NEXT: ret void
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//
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void clear_release(char *ptr) {
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__atomic_clear(ptr, memory_order_release);
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}
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// CHECK-LABEL: define dso_local void @clear_dynamic(
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// CHECK-SAME: ptr noundef [[PTR:%.*]], i32 noundef [[ORDER:%.*]]) #[[ATTR0]] {
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// CHECK-NEXT: [[ENTRY:.*:]]
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// CHECK-NEXT: [[PTR_ADDR:%.*]] = alloca ptr, align 8
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// CHECK-NEXT: [[ORDER_ADDR:%.*]] = alloca i32, align 4
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// CHECK-NEXT: store ptr [[PTR]], ptr [[PTR_ADDR]], align 8
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// CHECK-NEXT: store i32 [[ORDER]], ptr [[ORDER_ADDR]], align 4
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// CHECK-NEXT: [[TMP0:%.*]] = load ptr, ptr [[PTR_ADDR]], align 8
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// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr [[ORDER_ADDR]], align 4
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// CHECK-NEXT: switch i32 [[TMP1]], label %[[MONOTONIC:.*]] [
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// CHECK-NEXT: i32 3, label %[[RELEASE:.*]]
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// CHECK-NEXT: i32 5, label %[[SEQCST:.*]]
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// CHECK-NEXT: ]
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// CHECK: [[MONOTONIC]]:
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// CHECK-NEXT: store atomic i8 0, ptr [[TMP0]] monotonic, align 1
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// CHECK-NEXT: br label %[[ATOMIC_CONTINUE:.*]]
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// CHECK: [[RELEASE]]:
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// CHECK-NEXT: store atomic i8 0, ptr [[TMP0]] release, align 1
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// CHECK-NEXT: br label %[[ATOMIC_CONTINUE]]
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// CHECK: [[SEQCST]]:
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// CHECK-NEXT: store atomic i8 0, ptr [[TMP0]] seq_cst, align 1
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// CHECK-NEXT: br label %[[ATOMIC_CONTINUE]]
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// CHECK: [[ATOMIC_CONTINUE]]:
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// CHECK-NEXT: ret void
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//
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void clear_dynamic(char *ptr, int order) {
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__atomic_clear(ptr, order);
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}
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// CHECK-LABEL: define dso_local void @test_and_set_relaxed(
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// CHECK-SAME: ptr noundef [[PTR:%.*]]) #[[ATTR0]] {
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// CHECK-NEXT: [[ENTRY:.*:]]
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// CHECK-NEXT: [[PTR_ADDR:%.*]] = alloca ptr, align 8
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// CHECK-NEXT: [[ATOMIC_TEMP:%.*]] = alloca i8, align 1
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// CHECK-NEXT: store ptr [[PTR]], ptr [[PTR_ADDR]], align 8
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// CHECK-NEXT: [[TMP0:%.*]] = load ptr, ptr [[PTR_ADDR]], align 8
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// CHECK-NEXT: [[TMP1:%.*]] = atomicrmw xchg ptr [[TMP0]], i8 1 monotonic, align 1
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// CHECK-NEXT: [[TOBOOL:%.*]] = icmp ne i8 [[TMP1]], 0
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// CHECK-NEXT: store i1 [[TOBOOL]], ptr [[ATOMIC_TEMP]], align 1
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// CHECK-NEXT: [[TMP2:%.*]] = load i8, ptr [[ATOMIC_TEMP]], align 1
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// CHECK-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP2]] to i1
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// CHECK-NEXT: ret void
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//
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void test_and_set_relaxed(char *ptr) {
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__atomic_test_and_set(ptr, memory_order_relaxed);
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}
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// CHECK-LABEL: define dso_local void @test_and_set_consume(
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// CHECK-SAME: ptr noundef [[PTR:%.*]]) #[[ATTR0]] {
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// CHECK-NEXT: [[ENTRY:.*:]]
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// CHECK-NEXT: [[PTR_ADDR:%.*]] = alloca ptr, align 8
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// CHECK-NEXT: [[ATOMIC_TEMP:%.*]] = alloca i8, align 1
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// CHECK-NEXT: store ptr [[PTR]], ptr [[PTR_ADDR]], align 8
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// CHECK-NEXT: [[TMP0:%.*]] = load ptr, ptr [[PTR_ADDR]], align 8
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// CHECK-NEXT: [[TMP1:%.*]] = atomicrmw xchg ptr [[TMP0]], i8 1 acquire, align 1
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// CHECK-NEXT: [[TOBOOL:%.*]] = icmp ne i8 [[TMP1]], 0
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// CHECK-NEXT: store i1 [[TOBOOL]], ptr [[ATOMIC_TEMP]], align 1
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// CHECK-NEXT: [[TMP2:%.*]] = load i8, ptr [[ATOMIC_TEMP]], align 1
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// CHECK-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP2]] to i1
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// CHECK-NEXT: ret void
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//
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void test_and_set_consume(char *ptr) {
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__atomic_test_and_set(ptr, memory_order_consume);
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}
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// CHECK-LABEL: define dso_local void @test_and_set_acquire(
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// CHECK-SAME: ptr noundef [[PTR:%.*]]) #[[ATTR0]] {
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// CHECK-NEXT: [[ENTRY:.*:]]
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// CHECK-NEXT: [[PTR_ADDR:%.*]] = alloca ptr, align 8
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// CHECK-NEXT: [[ATOMIC_TEMP:%.*]] = alloca i8, align 1
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// CHECK-NEXT: store ptr [[PTR]], ptr [[PTR_ADDR]], align 8
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// CHECK-NEXT: [[TMP0:%.*]] = load ptr, ptr [[PTR_ADDR]], align 8
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// CHECK-NEXT: [[TMP1:%.*]] = atomicrmw xchg ptr [[TMP0]], i8 1 acquire, align 1
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// CHECK-NEXT: [[TOBOOL:%.*]] = icmp ne i8 [[TMP1]], 0
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// CHECK-NEXT: store i1 [[TOBOOL]], ptr [[ATOMIC_TEMP]], align 1
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// CHECK-NEXT: [[TMP2:%.*]] = load i8, ptr [[ATOMIC_TEMP]], align 1
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// CHECK-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP2]] to i1
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// CHECK-NEXT: ret void
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//
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void test_and_set_acquire(char *ptr) {
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__atomic_test_and_set(ptr, memory_order_acquire);
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}
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// CHECK-LABEL: define dso_local void @test_and_set_release(
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// CHECK-SAME: ptr noundef [[PTR:%.*]]) #[[ATTR0]] {
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// CHECK-NEXT: [[ENTRY:.*:]]
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// CHECK-NEXT: [[PTR_ADDR:%.*]] = alloca ptr, align 8
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// CHECK-NEXT: [[ATOMIC_TEMP:%.*]] = alloca i8, align 1
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// CHECK-NEXT: store ptr [[PTR]], ptr [[PTR_ADDR]], align 8
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// CHECK-NEXT: [[TMP0:%.*]] = load ptr, ptr [[PTR_ADDR]], align 8
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// CHECK-NEXT: [[TMP1:%.*]] = atomicrmw xchg ptr [[TMP0]], i8 1 release, align 1
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// CHECK-NEXT: [[TOBOOL:%.*]] = icmp ne i8 [[TMP1]], 0
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// CHECK-NEXT: store i1 [[TOBOOL]], ptr [[ATOMIC_TEMP]], align 1
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// CHECK-NEXT: [[TMP2:%.*]] = load i8, ptr [[ATOMIC_TEMP]], align 1
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// CHECK-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP2]] to i1
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// CHECK-NEXT: ret void
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//
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void test_and_set_release(char *ptr) {
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__atomic_test_and_set(ptr, memory_order_release);
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}
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// CHECK-LABEL: define dso_local void @test_and_set_acq_rel(
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// CHECK-SAME: ptr noundef [[PTR:%.*]]) #[[ATTR0]] {
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// CHECK-NEXT: [[ENTRY:.*:]]
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// CHECK-NEXT: [[PTR_ADDR:%.*]] = alloca ptr, align 8
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// CHECK-NEXT: [[ATOMIC_TEMP:%.*]] = alloca i8, align 1
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// CHECK-NEXT: store ptr [[PTR]], ptr [[PTR_ADDR]], align 8
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// CHECK-NEXT: [[TMP0:%.*]] = load ptr, ptr [[PTR_ADDR]], align 8
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// CHECK-NEXT: [[TMP1:%.*]] = atomicrmw xchg ptr [[TMP0]], i8 1 acq_rel, align 1
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// CHECK-NEXT: [[TOBOOL:%.*]] = icmp ne i8 [[TMP1]], 0
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// CHECK-NEXT: store i1 [[TOBOOL]], ptr [[ATOMIC_TEMP]], align 1
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// CHECK-NEXT: [[TMP2:%.*]] = load i8, ptr [[ATOMIC_TEMP]], align 1
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// CHECK-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP2]] to i1
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// CHECK-NEXT: ret void
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//
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void test_and_set_acq_rel(char *ptr) {
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__atomic_test_and_set(ptr, memory_order_acq_rel);
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}
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// CHECK-LABEL: define dso_local void @test_and_set_seq_cst(
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// CHECK-SAME: ptr noundef [[PTR:%.*]]) #[[ATTR0]] {
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// CHECK-NEXT: [[ENTRY:.*:]]
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// CHECK-NEXT: [[PTR_ADDR:%.*]] = alloca ptr, align 8
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// CHECK-NEXT: [[ATOMIC_TEMP:%.*]] = alloca i8, align 1
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// CHECK-NEXT: store ptr [[PTR]], ptr [[PTR_ADDR]], align 8
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// CHECK-NEXT: [[TMP0:%.*]] = load ptr, ptr [[PTR_ADDR]], align 8
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// CHECK-NEXT: [[TMP1:%.*]] = atomicrmw xchg ptr [[TMP0]], i8 1 seq_cst, align 1
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// CHECK-NEXT: [[TOBOOL:%.*]] = icmp ne i8 [[TMP1]], 0
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// CHECK-NEXT: store i1 [[TOBOOL]], ptr [[ATOMIC_TEMP]], align 1
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// CHECK-NEXT: [[TMP2:%.*]] = load i8, ptr [[ATOMIC_TEMP]], align 1
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// CHECK-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP2]] to i1
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// CHECK-NEXT: ret void
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//
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void test_and_set_seq_cst(char *ptr) {
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__atomic_test_and_set(ptr, memory_order_seq_cst);
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}
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// CHECK-LABEL: define dso_local void @test_and_set_dynamic(
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// CHECK-SAME: ptr noundef [[PTR:%.*]], i32 noundef [[ORDER:%.*]]) #[[ATTR0]] {
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// CHECK-NEXT: [[ENTRY:.*:]]
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// CHECK-NEXT: [[PTR_ADDR:%.*]] = alloca ptr, align 8
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// CHECK-NEXT: [[ORDER_ADDR:%.*]] = alloca i32, align 4
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// CHECK-NEXT: [[ATOMIC_TEMP:%.*]] = alloca i8, align 1
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// CHECK-NEXT: store ptr [[PTR]], ptr [[PTR_ADDR]], align 8
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// CHECK-NEXT: store i32 [[ORDER]], ptr [[ORDER_ADDR]], align 4
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// CHECK-NEXT: [[TMP0:%.*]] = load ptr, ptr [[PTR_ADDR]], align 8
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// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr [[ORDER_ADDR]], align 4
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// CHECK-NEXT: switch i32 [[TMP1]], label %[[MONOTONIC:.*]] [
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// CHECK-NEXT: i32 1, label %[[ACQUIRE:.*]]
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// CHECK-NEXT: i32 2, label %[[ACQUIRE]]
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// CHECK-NEXT: i32 3, label %[[RELEASE:.*]]
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// CHECK-NEXT: i32 4, label %[[ACQREL:.*]]
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// CHECK-NEXT: i32 5, label %[[SEQCST:.*]]
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// CHECK-NEXT: ]
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// CHECK: [[MONOTONIC]]:
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// CHECK-NEXT: [[TMP2:%.*]] = atomicrmw xchg ptr [[TMP0]], i8 1 monotonic, align 1
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// CHECK-NEXT: [[TOBOOL:%.*]] = icmp ne i8 [[TMP2]], 0
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// CHECK-NEXT: store i1 [[TOBOOL]], ptr [[ATOMIC_TEMP]], align 1
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// CHECK-NEXT: br label %[[ATOMIC_CONTINUE:.*]]
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// CHECK: [[ACQUIRE]]:
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// CHECK-NEXT: [[TMP3:%.*]] = atomicrmw xchg ptr [[TMP0]], i8 1 acquire, align 1
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// CHECK-NEXT: [[TOBOOL1:%.*]] = icmp ne i8 [[TMP3]], 0
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// CHECK-NEXT: store i1 [[TOBOOL1]], ptr [[ATOMIC_TEMP]], align 1
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// CHECK-NEXT: br label %[[ATOMIC_CONTINUE]]
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// CHECK: [[RELEASE]]:
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// CHECK-NEXT: [[TMP4:%.*]] = atomicrmw xchg ptr [[TMP0]], i8 1 release, align 1
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// CHECK-NEXT: [[TOBOOL2:%.*]] = icmp ne i8 [[TMP4]], 0
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// CHECK-NEXT: store i1 [[TOBOOL2]], ptr [[ATOMIC_TEMP]], align 1
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// CHECK-NEXT: br label %[[ATOMIC_CONTINUE]]
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// CHECK: [[ACQREL]]:
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// CHECK-NEXT: [[TMP5:%.*]] = atomicrmw xchg ptr [[TMP0]], i8 1 acq_rel, align 1
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// CHECK-NEXT: [[TOBOOL3:%.*]] = icmp ne i8 [[TMP5]], 0
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// CHECK-NEXT: store i1 [[TOBOOL3]], ptr [[ATOMIC_TEMP]], align 1
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// CHECK-NEXT: br label %[[ATOMIC_CONTINUE]]
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// CHECK: [[SEQCST]]:
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// CHECK-NEXT: [[TMP6:%.*]] = atomicrmw xchg ptr [[TMP0]], i8 1 seq_cst, align 1
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// CHECK-NEXT: [[TOBOOL4:%.*]] = icmp ne i8 [[TMP6]], 0
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// CHECK-NEXT: store i1 [[TOBOOL4]], ptr [[ATOMIC_TEMP]], align 1
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// CHECK-NEXT: br label %[[ATOMIC_CONTINUE]]
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// CHECK: [[ATOMIC_CONTINUE]]:
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// CHECK-NEXT: [[TMP7:%.*]] = load i8, ptr [[ATOMIC_TEMP]], align 1
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// CHECK-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP7]] to i1
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// CHECK-NEXT: ret void
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//
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void test_and_set_dynamic(char *ptr, int order) {
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__atomic_test_and_set(ptr, order);
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}
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// CHECK-LABEL: define dso_local void @test_and_set_array(
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// CHECK-SAME: ) #[[ATTR0]] {
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// CHECK-NEXT: [[ENTRY:.*:]]
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// CHECK-NEXT: [[X:%.*]] = alloca [10 x i32], align 4
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// CHECK-NEXT: [[ATOMIC_TEMP:%.*]] = alloca i8, align 1
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// CHECK-NEXT: [[ARRAYDECAY:%.*]] = getelementptr inbounds [10 x i32], ptr [[X]], i64 0, i64 0
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// CHECK-NEXT: [[TMP0:%.*]] = atomicrmw volatile xchg ptr [[ARRAYDECAY]], i8 1 seq_cst, align 4
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// CHECK-NEXT: [[TOBOOL:%.*]] = icmp ne i8 [[TMP0]], 0
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// CHECK-NEXT: store i1 [[TOBOOL]], ptr [[ATOMIC_TEMP]], align 1
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// CHECK-NEXT: [[TMP1:%.*]] = load i8, ptr [[ATOMIC_TEMP]], align 1
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// CHECK-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP1]] to i1
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// CHECK-NEXT: ret void
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//
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void test_and_set_array() {
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volatile int x[10];
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__atomic_test_and_set(x, memory_order_seq_cst);
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}
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// These intrinsics accept any pointer type, including void and incomplete
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// structs, and always access the first byte regardless of the actual type
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// size.
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struct incomplete;
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// CHECK-LABEL: define dso_local void @clear_int(
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// CHECK-SAME: ptr noundef [[PTR:%.*]]) #[[ATTR0]] {
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// CHECK-NEXT: [[ENTRY:.*:]]
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// CHECK-NEXT: [[PTR_ADDR:%.*]] = alloca ptr, align 8
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// CHECK-NEXT: store ptr [[PTR]], ptr [[PTR_ADDR]], align 8
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// CHECK-NEXT: [[TMP0:%.*]] = load ptr, ptr [[PTR_ADDR]], align 8
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// CHECK-NEXT: store atomic i8 0, ptr [[TMP0]] monotonic, align 4
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// CHECK-NEXT: ret void
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//
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void clear_int(int *ptr) {
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__atomic_clear(ptr, memory_order_relaxed);
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}
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// CHECK-LABEL: define dso_local void @clear_void(
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// CHECK-SAME: ptr noundef [[PTR:%.*]]) #[[ATTR0]] {
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// CHECK-NEXT: [[ENTRY:.*:]]
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// CHECK-NEXT: [[PTR_ADDR:%.*]] = alloca ptr, align 8
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// CHECK-NEXT: store ptr [[PTR]], ptr [[PTR_ADDR]], align 8
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// CHECK-NEXT: [[TMP0:%.*]] = load ptr, ptr [[PTR_ADDR]], align 8
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// CHECK-NEXT: store atomic i8 0, ptr [[TMP0]] monotonic, align 1
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// CHECK-NEXT: ret void
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//
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void clear_void(void *ptr) {
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__atomic_clear(ptr, memory_order_relaxed);
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}
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// CHECK-LABEL: define dso_local void @clear_incomplete(
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// CHECK-SAME: ptr noundef [[PTR:%.*]]) #[[ATTR0]] {
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// CHECK-NEXT: [[ENTRY:.*:]]
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// CHECK-NEXT: [[PTR_ADDR:%.*]] = alloca ptr, align 8
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// CHECK-NEXT: store ptr [[PTR]], ptr [[PTR_ADDR]], align 8
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// CHECK-NEXT: [[TMP0:%.*]] = load ptr, ptr [[PTR_ADDR]], align 8
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// CHECK-NEXT: store atomic i8 0, ptr [[TMP0]] monotonic, align 1
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// CHECK-NEXT: ret void
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//
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void clear_incomplete(struct incomplete *ptr) {
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__atomic_clear(ptr, memory_order_relaxed);
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}
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// CHECK-LABEL: define dso_local void @test_and_set_int(
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// CHECK-SAME: ptr noundef [[PTR:%.*]]) #[[ATTR0]] {
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// CHECK-NEXT: [[ENTRY:.*:]]
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// CHECK-NEXT: [[PTR_ADDR:%.*]] = alloca ptr, align 8
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// CHECK-NEXT: [[ATOMIC_TEMP:%.*]] = alloca i8, align 1
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// CHECK-NEXT: store ptr [[PTR]], ptr [[PTR_ADDR]], align 8
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// CHECK-NEXT: [[TMP0:%.*]] = load ptr, ptr [[PTR_ADDR]], align 8
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// CHECK-NEXT: [[TMP1:%.*]] = atomicrmw xchg ptr [[TMP0]], i8 1 monotonic, align 4
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// CHECK-NEXT: [[TOBOOL:%.*]] = icmp ne i8 [[TMP1]], 0
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// CHECK-NEXT: store i1 [[TOBOOL]], ptr [[ATOMIC_TEMP]], align 1
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// CHECK-NEXT: [[TMP2:%.*]] = load i8, ptr [[ATOMIC_TEMP]], align 1
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// CHECK-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP2]] to i1
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// CHECK-NEXT: ret void
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//
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void test_and_set_int(int *ptr) {
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__atomic_test_and_set(ptr, memory_order_relaxed);
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}
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// CHECK-LABEL: define dso_local void @test_and_set_void(
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// CHECK-SAME: ptr noundef [[PTR:%.*]]) #[[ATTR0]] {
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// CHECK-NEXT: [[ENTRY:.*:]]
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// CHECK-NEXT: [[PTR_ADDR:%.*]] = alloca ptr, align 8
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// CHECK-NEXT: [[ATOMIC_TEMP:%.*]] = alloca i8, align 1
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// CHECK-NEXT: store ptr [[PTR]], ptr [[PTR_ADDR]], align 8
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// CHECK-NEXT: [[TMP0:%.*]] = load ptr, ptr [[PTR_ADDR]], align 8
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// CHECK-NEXT: [[TMP1:%.*]] = atomicrmw xchg ptr [[TMP0]], i8 1 monotonic, align 1
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// CHECK-NEXT: [[TOBOOL:%.*]] = icmp ne i8 [[TMP1]], 0
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// CHECK-NEXT: store i1 [[TOBOOL]], ptr [[ATOMIC_TEMP]], align 1
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// CHECK-NEXT: [[TMP2:%.*]] = load i8, ptr [[ATOMIC_TEMP]], align 1
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// CHECK-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP2]] to i1
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// CHECK-NEXT: ret void
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//
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void test_and_set_void(void *ptr) {
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__atomic_test_and_set(ptr, memory_order_relaxed);
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}
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// CHECK-LABEL: define dso_local void @test_and_set_incomplete(
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// CHECK-SAME: ptr noundef [[PTR:%.*]]) #[[ATTR0]] {
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// CHECK-NEXT: [[ENTRY:.*:]]
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// CHECK-NEXT: [[PTR_ADDR:%.*]] = alloca ptr, align 8
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// CHECK-NEXT: [[ATOMIC_TEMP:%.*]] = alloca i8, align 1
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// CHECK-NEXT: store ptr [[PTR]], ptr [[PTR_ADDR]], align 8
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// CHECK-NEXT: [[TMP0:%.*]] = load ptr, ptr [[PTR_ADDR]], align 8
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// CHECK-NEXT: [[TMP1:%.*]] = atomicrmw xchg ptr [[TMP0]], i8 1 monotonic, align 1
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// CHECK-NEXT: [[TOBOOL:%.*]] = icmp ne i8 [[TMP1]], 0
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// CHECK-NEXT: store i1 [[TOBOOL]], ptr [[ATOMIC_TEMP]], align 1
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// CHECK-NEXT: [[TMP2:%.*]] = load i8, ptr [[ATOMIC_TEMP]], align 1
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// CHECK-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP2]] to i1
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|
// CHECK-NEXT: ret void
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|
//
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void test_and_set_incomplete(struct incomplete *ptr) {
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__atomic_test_and_set(ptr, memory_order_relaxed);
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|
}
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