vasilito
b9874d0941
Add redbear-usb-storage-check in-guest binary that validates USB mass storage read and write I/O: discovers /scheme/disk/ devices, writes a test pattern to sector 2048, reads it back, verifies match, restores original content. Updates test-usb-storage-qemu.sh with write-proof verification step. Includes all accumulated Red Bear OS work: kernel patches, relibc patches, driver infrastructure, DRM/GPU, KDE recipes, firmware, validation tooling, build system hardening, and documentation.
259 lines
12 KiB
Rust
259 lines
12 KiB
Rust
use common::io::{Io, MmioPtr};
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use syscall::error::Result;
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use super::{MmioRegion, Pipe};
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// IHD-OS-KBL-Vol 2c-1.17 TRANS_CONF
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// IHD-OS-TGL-Vol 2c-12.21 TRANS_CONF
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pub const TRANS_CONF_ENABLE: u32 = 1 << 31;
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pub const TRANS_CONF_STATE: u32 = 1 << 30;
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pub const TRANS_CONF_MODE_MASK: u32 = 0b11 << 21;
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// IHD-OS-KBL-Vol 2c-1.17 TRANS_DDI_FUNC_CTL
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// IHD-OS-TGL-Vol 2c-12.21 TRANS_DDI_FUNC_CTL
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pub const TRANS_DDI_FUNC_CTL_ENABLE: u32 = 1 << 31;
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pub const TRANS_DDI_FUNC_CTL_MODE_HDMI: u32 = 0b000 << 24;
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pub const TRANS_DDI_FUNC_CTL_MODE_DVI: u32 = 0b001 << 24;
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pub const TRANS_DDI_FUNC_CTL_MODE_DP_SST: u32 = 0b010 << 24;
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pub const TRANS_DDI_FUNC_CTL_MODE_DP_MST: u32 = 0b011 << 24;
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pub const TRANS_DDI_FUNC_CTL_BPC_8: u32 = 0b000 << 20;
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pub const TRANS_DDI_FUNC_CTL_BPC_10: u32 = 0b001 << 20;
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pub const TRANS_DDI_FUNC_CTL_BPC_6: u32 = 0b010 << 20;
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pub const TRANS_DDI_FUNC_CTL_BPC_12: u32 = 0b011 << 20;
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pub const TRANS_DDI_FUNC_CTL_SYNC_POLARITY_HSHIGH: u32 = 0b01 << 16;
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pub const TRANS_DDI_FUNC_CTL_SYNC_POLARITY_VSHIGH: u32 = 0b10 << 16;
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pub const TRANS_DDI_FUNC_CTL_DSI_INPUT_PIPE_SHIFT: u32 = 12;
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pub const TRANS_DDI_FUNC_CTL_PORT_WIDTH_1: u32 = 0b000 << 1;
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pub const TRANS_DDI_FUNC_CTL_PORT_WIDTH_2: u32 = 0b001 << 1;
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pub const TRANS_DDI_FUNC_CTL_PORT_WIDTH_3: u32 = 0b010 << 1;
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pub const TRANS_DDI_FUNC_CTL_PORT_WIDTH_4: u32 = 0b011 << 1;
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pub struct Transcoder {
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pub name: &'static str,
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pub index: usize,
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pub clk_sel: MmioPtr<u32>,
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pub clk_sel_shift: u32,
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pub conf: MmioPtr<u32>,
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pub ddi_func_ctl: MmioPtr<u32>,
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pub ddi_func_ctl_ddi_shift: u32,
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pub ddi_func_ctl_hdmi_scrambling: u32,
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pub ddi_func_ctl_high_tmds_char_rate: u32,
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pub ddi_func_ctl2: Option<MmioPtr<u32>>,
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pub hblank: MmioPtr<u32>,
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pub hsync: MmioPtr<u32>,
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pub htotal: MmioPtr<u32>,
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pub msa_misc: MmioPtr<u32>,
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pub mult: MmioPtr<u32>,
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pub push: Option<MmioPtr<u32>>,
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pub space: MmioPtr<u32>,
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pub stereo3d_ctl: MmioPtr<u32>,
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pub vblank: MmioPtr<u32>,
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pub vrr_ctl: Option<MmioPtr<u32>>,
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pub vrr_flipline: Option<MmioPtr<u32>>,
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pub vrr_status: Option<MmioPtr<u32>>,
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pub vrr_status2: Option<MmioPtr<u32>>,
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pub vrr_vmax: Option<MmioPtr<u32>>,
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pub vrr_vmaxshift: Option<MmioPtr<u32>>,
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pub vrr_vmin: Option<MmioPtr<u32>>,
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pub vrr_vtotal_prev: Option<MmioPtr<u32>>,
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pub vsync: MmioPtr<u32>,
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pub vsyncshift: MmioPtr<u32>,
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pub vtotal: MmioPtr<u32>,
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}
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impl Transcoder {
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pub fn dump(&self) {
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eprint!("Transcoder {} {}", self.name, self.index);
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eprint!(" clk_sel {:08X}", self.clk_sel.read());
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eprint!(" conf {:08X}", self.conf.read());
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eprint!(" ddi_func_ctl {:08X}", self.ddi_func_ctl.read());
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if let Some(reg) = &self.ddi_func_ctl2 {
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eprint!(" ddi_func_ctl2 {:08X}", reg.read());
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}
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eprint!(" hblank {:08X}", self.hblank.read());
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eprint!(" hsync {:08X}", self.hsync.read());
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eprint!(" htotal {:08X}", self.htotal.read());
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eprint!(" msa_misc {:08X}", self.msa_misc.read());
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eprint!(" mult {:08X}", self.mult.read());
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if let Some(reg) = &self.push {
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eprint!(" push {:08X}", reg.read());
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}
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eprint!(" space {:08X}", self.space.read());
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eprint!(" stereo3d_ctl {:08X}", self.stereo3d_ctl.read());
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eprint!(" vblank {:08X}", self.vblank.read());
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if let Some(reg) = &self.vrr_ctl {
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eprint!(" vrr_ctl {:08X}", reg.read());
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}
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if let Some(reg) = &self.vrr_flipline {
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eprint!(" vrr_flipline {:08X}", reg.read());
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}
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if let Some(reg) = &self.vrr_status {
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eprint!(" vrr_status {:08X}", reg.read());
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}
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if let Some(reg) = &self.vrr_status2 {
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eprint!(" vrr_status2 {:08X}", reg.read());
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}
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if let Some(reg) = &self.vrr_vmax {
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eprint!(" vrr_vmax {:08X}", reg.read());
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}
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if let Some(reg) = &self.vrr_vmaxshift {
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eprint!(" vrr_vmaxshift {:08X}", reg.read());
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}
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if let Some(reg) = &self.vrr_vmin {
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eprint!(" vrr_vmin {:08X}", reg.read());
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}
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if let Some(reg) = &self.vrr_vtotal_prev {
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eprint!(" vrr_vtotal_prev {:08X}", reg.read());
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}
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eprint!(" vsync {:08X}", self.vsync.read());
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eprint!(" vsyncshift {:08X}", self.vsyncshift.read());
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eprint!(" vtotal {:08X}", self.vtotal.read());
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eprintln!();
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}
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pub fn modeset(&mut self, pipe: &mut Pipe, timing: &edid::DetailedTiming) {
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let hactive = (timing.horizontal_active_pixels as u32) - 1;
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let htotal = hactive + (timing.horizontal_blanking_pixels as u32);
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let hsync_start = hactive + (timing.horizontal_front_porch as u32);
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let hsync_end = hsync_start + (timing.horizontal_sync_width as u32);
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let vactive = (timing.vertical_active_lines as u32) - 1;
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let vtotal = vactive + (timing.vertical_blanking_lines as u32);
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let vsync_start = vactive + (timing.vertical_front_porch as u32);
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let vsync_end = vsync_start + (timing.vertical_sync_width as u32);
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// Configure horizontal sync
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self.htotal.write(hactive | (htotal << 16));
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self.hblank.write(hactive | (htotal << 16));
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self.hsync.write(hsync_start | (hsync_end << 16));
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// Configure vertical sync
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self.vtotal.write(vactive | (vtotal << 16));
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self.vblank.write(vactive | (vtotal << 16));
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self.vsync.write(vsync_start | (vsync_end << 16));
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// Configure pipe
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pipe.srcsz.write(vactive | (hactive << 16));
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}
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pub fn kabylake(gttmm: &MmioRegion) -> Result<Vec<Self>> {
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let mut transcoders = Vec::with_capacity(4);
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//TODO: Transcoder EDP
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for (i, name) in ["A", "B", "C"].iter().enumerate() {
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transcoders.push(Transcoder {
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name,
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index: i,
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// IHD-OS-KBL-Vol 2c-1.17 TRANS_CLK_SEL
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clk_sel: unsafe { gttmm.mmio(0x46140 + i * 0x4)? },
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clk_sel_shift: 29,
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// IHD-OS-KBL-Vol 2c-1.17 TRANS_CONF
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conf: unsafe { gttmm.mmio(0x70008 + i * 0x1000)? },
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// IHD-OS-KBL-Vol 2c-1.17 TRANS_DDI_FUNC_CTL
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ddi_func_ctl: unsafe { gttmm.mmio(0x60400 + i * 0x1000)? },
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ddi_func_ctl_ddi_shift: 28,
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// HDMI scrambling not supported on Kaby Lake
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ddi_func_ctl_hdmi_scrambling: 0,
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ddi_func_ctl_high_tmds_char_rate: 0,
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// N/A
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ddi_func_ctl2: None,
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// IHD-OS-KBL-Vol 2c-1.17 TRANS_HBLANK
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hblank: unsafe { gttmm.mmio(0x60004 + i * 0x1000)? },
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// IHD-OS-KBL-Vol 2c-1.17 TRANS_HSYNC
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hsync: unsafe { gttmm.mmio(0x60008 + i * 0x1000)? },
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// IHD-OS-KBL-Vol 2c-1.17 TRANS_HTOTAL
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htotal: unsafe { gttmm.mmio(0x60000 + i * 0x1000)? },
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// IHD-OS-KBL-Vol 2c-1.17 TRANS_MSA_MISC
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msa_misc: unsafe { gttmm.mmio(0x60410 + i * 0x1000)? },
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// IHD-OS-KBL-Vol 2c-1.17 TRANS_MULT
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mult: unsafe { gttmm.mmio(0x6002C + i * 0x1000)? },
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// N/A
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push: None,
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// IHD-OS-KBL-Vol 2c-1.17 TRANS_SPACE
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space: unsafe { gttmm.mmio(0x60020 + i * 0x1000)? },
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// IHD-OS-KBL-Vol 2c-1.17 TRANS_STEREO3D_CTL
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stereo3d_ctl: unsafe { gttmm.mmio(0x70020 + i * 0x1000)? },
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// IHD-OS-KBL-Vol 2c-1.17 TRANS_VBLANK
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vblank: unsafe { gttmm.mmio(0x60010 + i * 0x1000)? },
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// N/A
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vrr_ctl: None,
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vrr_flipline: None,
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vrr_status: None,
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vrr_status2: None,
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vrr_vmax: None,
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vrr_vmaxshift: None,
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vrr_vmin: None,
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vrr_vtotal_prev: None,
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// IHD-OS-KBL-Vol 2c-1.17 TRANS_VSYNC
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vsync: unsafe { gttmm.mmio(0x60014 + i * 0x1000)? },
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// IHD-OS-KBL-Vol 2c-1.17 TRANS_VSYNCSHIFT
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vsyncshift: unsafe { gttmm.mmio(0x60028 + i * 0x1000)? },
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// IHD-OS-KBL-Vol 2c-1.17 TRANS_VTOTAL
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vtotal: unsafe { gttmm.mmio(0x6000C + i * 0x1000)? },
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});
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}
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Ok(transcoders)
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}
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pub fn tigerlake(gttmm: &MmioRegion) -> Result<Vec<Self>> {
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let mut transcoders = Vec::with_capacity(4);
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for (i, name) in ["A", "B", "C", "D"].iter().enumerate() {
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transcoders.push(Transcoder {
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name,
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index: i,
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// IHD-OS-TGL-Vol 2c-12.21 TRANS_CLK_SEL
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clk_sel: unsafe { gttmm.mmio(0x46140 + i * 0x4)? },
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clk_sel_shift: 28,
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// IHD-OS-TGL-Vol 2c-12.21 TRANS_CONF
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conf: unsafe { gttmm.mmio(0x70008 + i * 0x1000)? },
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// IHD-OS-TGL-Vol 2c-12.21 TRANS_DDI_FUNC_CTL
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ddi_func_ctl: unsafe { gttmm.mmio(0x60400 + i * 0x1000)? },
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ddi_func_ctl_ddi_shift: 27,
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ddi_func_ctl_hdmi_scrambling: 1 << 0,
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ddi_func_ctl_high_tmds_char_rate: 1 << 4,
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// IHD-OS-TGL-Vol 2c-12.21 TRANS_DDI_FUNC_CTL2
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ddi_func_ctl2: Some(unsafe { gttmm.mmio(0x60404 + i * 0x1000)? }),
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// IHD-OS-TGL-Vol 2c-12.21 TRANS_HBLANK
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hblank: unsafe { gttmm.mmio(0x60004 + i * 0x1000)? },
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// IHD-OS-TGL-Vol 2c-12.21 TRANS_HSYNC
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hsync: unsafe { gttmm.mmio(0x60008 + i * 0x1000)? },
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// IHD-OS-TGL-Vol 2c-12.21 TRANS_HTOTAL
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htotal: unsafe { gttmm.mmio(0x60000 + i * 0x1000)? },
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// IHD-OS-TGL-Vol 2c-12.21 TRANS_MSA_MISC
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msa_misc: unsafe { gttmm.mmio(0x60410 + i * 0x1000)? },
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// IHD-OS-TGL-Vol 2c-12.21 TRANS_MULT
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mult: unsafe { gttmm.mmio(0x6002C + i * 0x1000)? },
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// IHD-OS-TGL-Vol 2c-12.21 TRANS_PUSH
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push: Some(unsafe { gttmm.mmio(0x60A70 + i * 0x1000)? }),
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// IHD-OS-TGL-Vol 2c-12.21 TRANS_SPACE
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space: unsafe { gttmm.mmio(0x60020 + i * 0x1000)? },
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// IHD-OS-TGL-Vol 2c-12.21 TRANS_STEREO3D_CTL
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stereo3d_ctl: unsafe { gttmm.mmio(0x70020 + i * 0x1000)? },
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// IHD-OS-TGL-Vol 2c-12.21 TRANS_VBLANK
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vblank: unsafe { gttmm.mmio(0x60010 + i * 0x1000)? },
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// IHD-OS-TGL-Vol 2c-12.21 TRANS_VRR_CTL
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vrr_ctl: Some(unsafe { gttmm.mmio(0x60420 + i * 0x1000)? }),
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// IHD-OS-TGL-Vol 2c-12.21 TRANS_VRR_FLIPLINE
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vrr_flipline: Some(unsafe { gttmm.mmio(0x60438 + i * 0x1000)? }),
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// IHD-OS-TGL-Vol 2c-12.21 TRANS_VRR_STATUS
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vrr_status: Some(unsafe { gttmm.mmio(0x6042C + i * 0x1000)? }),
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// IHD-OS-TGL-Vol 2c-12.21 TRANS_VRR_STATUS2
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vrr_status2: Some(unsafe { gttmm.mmio(0x6043C + i * 0x1000)? }),
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// IHD-OS-TGL-Vol 2c-12.21 TRANS_VRR_VMAX
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vrr_vmax: Some(unsafe { gttmm.mmio(0x60424 + i * 0x1000)? }),
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// IHD-OS-TGL-Vol 2c-12.21 TRANS_VRR_VMAXSHIFT
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vrr_vmaxshift: Some(unsafe { gttmm.mmio(0x60428 + i * 0x1000)? }),
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// IHD-OS-TGL-Vol 2c-12.21 TRANS_VRR_VMIN
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vrr_vmin: Some(unsafe { gttmm.mmio(0x60434 + i * 0x1000)? }),
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// IHD-OS-TGL-Vol 2c-12.21 TRANS_VRR_VTOTAL_PREV
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vrr_vtotal_prev: Some(unsafe { gttmm.mmio(0x60480 + i * 0x1000)? }),
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// IHD-OS-TGL-Vol 2c-12.21 TRANS_VSYNC
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vsync: unsafe { gttmm.mmio(0x60014 + i * 0x1000)? },
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// IHD-OS-TGL-Vol 2c-12.21 TRANS_VSYNCSHIFT
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vsyncshift: unsafe { gttmm.mmio(0x60028 + i * 0x1000)? },
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// IHD-OS-TGL-Vol 2c-12.21 TRANS_VTOTAL
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vtotal: unsafe { gttmm.mmio(0x6000C + i * 0x1000)? },
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})
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}
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Ok(transcoders)
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}
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}
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