338 lines
9.8 KiB
Rust
338 lines
9.8 KiB
Rust
use core::mem::size_of;
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use core::slice;
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use redox_driver_sys::dma::DmaBuffer;
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/// AMD-Vi Device Table: 65536 entries × 32 bytes = 2 MiB.
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pub const DEVICE_TABLE_ENTRIES: usize = 65_536;
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pub const DTE_SIZE: usize = 32;
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pub const DEVICE_TABLE_BYTES: usize = DEVICE_TABLE_ENTRIES * DTE_SIZE;
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const DTE_VALID_BIT: u64 = 1 << 0;
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const DTE_TRANSLATION_VALID_BIT: u64 = 1 << 1;
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const DTE_WRITE_PERMISSION_BIT: u64 = 1 << 4;
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const DTE_READ_PERMISSION_BIT: u64 = 1 << 5;
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const DTE_SNOOP_ENABLE_BIT: u64 = 1 << 8;
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const DTE_MODE_SHIFT: u32 = 9;
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const DTE_MODE_MASK: u64 = 0x7 << DTE_MODE_SHIFT;
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const DTE_PAGE_TABLE_ROOT_MASK: u64 = ((1u64 << 40) - 1) << 12;
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const DTE_INTERRUPT_REMAP_BIT: u64 = 1 << 61;
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const DTE_INTERRUPT_WRITE_BIT: u64 = 1 << 62;
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const DTE_INT_TABLE_LEN_MASK: u64 = 0xF;
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const DTE_INT_CONTROL_SHIFT: u32 = 4;
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const DTE_INT_CONTROL_MASK: u64 = 0x3 << DTE_INT_CONTROL_SHIFT;
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const DTE_INT_REMAP_TABLE_PTR_SHIFT: u32 = 6;
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const DTE_INT_REMAP_TABLE_PTR_MASK: u64 = ((1u64 << 46) - 1) << DTE_INT_REMAP_TABLE_PTR_SHIFT;
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/// Device Table Entry (DTE) — 256 bits (32 bytes = 4 × u64).
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///
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/// Layout follows AMD IOMMU Spec 48882 Rev 3.10, Section 3.2.2.
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#[derive(Clone, Copy, Debug, Default, PartialEq, Eq)]
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#[repr(C)]
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pub struct DeviceTableEntry {
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data: [u64; 4],
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}
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impl DeviceTableEntry {
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pub const fn new() -> Self {
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Self { data: [0; 4] }
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}
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pub fn valid(&self) -> bool {
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self.data[0] & DTE_VALID_BIT != 0
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}
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pub fn set_valid(&mut self, value: bool) {
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if value {
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self.data[0] |= DTE_VALID_BIT;
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} else {
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self.data[0] &= !DTE_VALID_BIT;
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}
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}
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pub fn translation_valid(&self) -> bool {
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self.data[0] & DTE_TRANSLATION_VALID_BIT != 0
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}
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pub fn set_translation_valid(&mut self, value: bool) {
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if value {
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self.data[0] |= DTE_TRANSLATION_VALID_BIT;
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} else {
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self.data[0] &= !DTE_TRANSLATION_VALID_BIT;
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}
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}
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pub fn write_permission(&self) -> bool {
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self.data[0] & DTE_WRITE_PERMISSION_BIT != 0
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}
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pub fn set_write_permission(&mut self, value: bool) {
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if value {
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self.data[0] |= DTE_WRITE_PERMISSION_BIT;
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} else {
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self.data[0] &= !DTE_WRITE_PERMISSION_BIT;
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}
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}
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pub fn read_permission(&self) -> bool {
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self.data[0] & DTE_READ_PERMISSION_BIT != 0
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}
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pub fn set_read_permission(&mut self, value: bool) {
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if value {
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self.data[0] |= DTE_READ_PERMISSION_BIT;
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} else {
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self.data[0] &= !DTE_READ_PERMISSION_BIT;
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}
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}
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pub fn snoop_enable(&self) -> bool {
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self.data[0] & DTE_SNOOP_ENABLE_BIT != 0
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}
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pub fn set_snoop_enable(&mut self, value: bool) {
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if value {
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self.data[0] |= DTE_SNOOP_ENABLE_BIT;
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} else {
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self.data[0] &= !DTE_SNOOP_ENABLE_BIT;
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}
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}
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pub fn mode(&self) -> u8 {
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((self.data[0] & DTE_MODE_MASK) >> DTE_MODE_SHIFT) as u8
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}
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pub fn set_mode(&mut self, mode: u8) {
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self.data[0] = (self.data[0] & !DTE_MODE_MASK) | (((mode as u64) & 0x7) << DTE_MODE_SHIFT);
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}
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/// Returns the full, 4KiB-aligned physical address stored in bits 12:51.
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pub fn page_table_root(&self) -> u64 {
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self.data[0] & DTE_PAGE_TABLE_ROOT_MASK
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}
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pub fn set_page_table_root(&mut self, phys: u64) {
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self.data[0] =
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(self.data[0] & !DTE_PAGE_TABLE_ROOT_MASK) | (phys & DTE_PAGE_TABLE_ROOT_MASK);
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}
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/// Interrupt remapping enable (bit 61 of word 0 in the AMD-Vi DTE).
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pub fn interrupt_remap(&self) -> bool {
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self.data[0] & DTE_INTERRUPT_REMAP_BIT != 0
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}
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pub fn set_interrupt_remap(&mut self, value: bool) {
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if value {
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self.data[0] |= DTE_INTERRUPT_REMAP_BIT;
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} else {
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self.data[0] &= !DTE_INTERRUPT_REMAP_BIT;
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}
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}
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/// Interrupt write permission (bit 62 of word 0 in the AMD-Vi DTE).
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pub fn interrupt_write(&self) -> bool {
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self.data[0] & DTE_INTERRUPT_WRITE_BIT != 0
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}
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pub fn set_interrupt_write(&mut self, value: bool) {
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if value {
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self.data[0] |= DTE_INTERRUPT_WRITE_BIT;
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} else {
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self.data[0] &= !DTE_INTERRUPT_WRITE_BIT;
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}
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}
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pub fn int_table_len(&self) -> u8 {
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(self.data[1] & DTE_INT_TABLE_LEN_MASK) as u8
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}
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pub fn set_int_table_len(&mut self, len: u8) {
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self.data[1] =
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(self.data[1] & !DTE_INT_TABLE_LEN_MASK) | ((len as u64) & DTE_INT_TABLE_LEN_MASK);
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}
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pub fn interrupt_control(&self) -> u8 {
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((self.data[1] & DTE_INT_CONTROL_MASK) >> DTE_INT_CONTROL_SHIFT) as u8
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}
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pub fn set_interrupt_control(&mut self, control: u8) {
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self.data[1] = (self.data[1] & !DTE_INT_CONTROL_MASK)
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| (((control as u64) & 0x3) << DTE_INT_CONTROL_SHIFT);
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}
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/// Returns the interrupt remap table pointer bits stored in word 1.
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pub fn int_remap_table_ptr(&self) -> u64 {
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self.data[1] & DTE_INT_REMAP_TABLE_PTR_MASK
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}
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pub fn set_int_remap_table_ptr(&mut self, phys: u64) {
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self.data[1] =
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(self.data[1] & !DTE_INT_REMAP_TABLE_PTR_MASK) | (phys & DTE_INT_REMAP_TABLE_PTR_MASK);
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}
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}
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const _: () = assert!(size_of::<DeviceTableEntry>() == DTE_SIZE);
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/// Device Table — manages the 65536-entry device table.
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pub struct DeviceTable {
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buffer: DmaBuffer,
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}
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impl DeviceTable {
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/// Allocate a new device table (65536 × 32 bytes = 2 MiB).
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pub fn new() -> Result<Self, &'static str> {
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let buffer = DmaBuffer::allocate(DEVICE_TABLE_BYTES, 4096)
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.map_err(|_| "failed to allocate IOMMU device table")?;
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if buffer.len() < DEVICE_TABLE_BYTES {
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return Err("IOMMU device table allocation was smaller than requested");
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}
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if !buffer.is_physically_contiguous() {
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return Err("IOMMU device table allocation is not physically contiguous");
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}
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Ok(Self { buffer })
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}
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pub fn get_entry(&self, device_id: u16) -> DeviceTableEntry {
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self.entries()[device_id as usize]
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}
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pub fn set_entry(&mut self, device_id: u16, entry: &DeviceTableEntry) {
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self.entries_mut()[device_id as usize] = *entry;
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}
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pub fn clear_entry(&mut self, device_id: u16) {
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self.entries_mut()[device_id as usize] = DeviceTableEntry::new();
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}
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pub fn physical_address(&self) -> usize {
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self.buffer.physical_address()
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}
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/// Convert PCI BDF to device ID.
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/// Bus: bits 8:15, Device: bits 3:7, Function: bits 0:2.
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pub fn bdf_to_device_id(bus: u8, device: u8, function: u8) -> u16 {
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((bus as u16) << 8) | ((device as u16) << 3) | (function as u16)
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}
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fn entries(&self) -> &[DeviceTableEntry] {
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unsafe {
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slice::from_raw_parts(
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self.buffer.as_ptr() as *const DeviceTableEntry,
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DEVICE_TABLE_ENTRIES,
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)
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}
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}
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fn entries_mut(&mut self) -> &mut [DeviceTableEntry] {
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unsafe {
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slice::from_raw_parts_mut(
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self.buffer.as_mut_ptr() as *mut DeviceTableEntry,
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DEVICE_TABLE_ENTRIES,
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)
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}
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}
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}
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#[cfg(test)]
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mod tests {
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use super::{DeviceTable, DeviceTableEntry, DTE_PAGE_TABLE_ROOT_MASK};
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fn try_allocate_table() -> Option<DeviceTable> {
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match DeviceTable::new() {
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Ok(table) => Some(table),
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Err(err) => {
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eprintln!("skipping DeviceTable allocation-dependent test: {err}");
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None
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}
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}
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}
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#[test]
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fn test_dte_valid_bit() {
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let mut entry = DeviceTableEntry::new();
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assert!(!entry.valid());
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entry.set_valid(true);
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assert!(entry.valid());
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entry.set_valid(false);
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assert!(!entry.valid());
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}
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#[test]
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fn test_dte_translation_valid() {
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let mut entry = DeviceTableEntry::new();
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assert!(!entry.translation_valid());
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entry.set_translation_valid(true);
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assert!(entry.translation_valid());
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entry.set_translation_valid(false);
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assert!(!entry.translation_valid());
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}
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#[test]
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fn test_dte_mode_4level() {
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let mut entry = DeviceTableEntry::new();
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entry.set_mode(4);
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assert_eq!(entry.mode(), 4);
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}
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#[test]
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fn test_dte_permissions_and_interrupt_control() {
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let mut entry = DeviceTableEntry::new();
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entry.set_read_permission(true);
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entry.set_write_permission(true);
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entry.set_snoop_enable(true);
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entry.set_interrupt_control(0x02);
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assert!(entry.read_permission());
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assert!(entry.write_permission());
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assert!(entry.snoop_enable());
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assert_eq!(entry.interrupt_control(), 0x02);
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}
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#[test]
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fn test_dte_page_table_root() {
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let mut entry = DeviceTableEntry::new();
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entry.set_page_table_root(0x1234_5000);
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assert_eq!(entry.page_table_root(), 0x1234_5000);
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assert_eq!(entry.data[0] & DTE_PAGE_TABLE_ROOT_MASK, 0x1234_5000);
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}
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#[test]
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fn test_bdf_encoding() {
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assert_eq!(DeviceTable::bdf_to_device_id(0x12, 0x05, 0x03), 0x122b);
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assert_eq!(DeviceTable::bdf_to_device_id(0xff, 0x1f, 0x07), 0xffff);
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}
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#[test]
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fn test_clear_entry() -> Result<(), &'static str> {
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let Some(mut table) = try_allocate_table() else {
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return Ok(());
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};
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let device_id = DeviceTable::bdf_to_device_id(0x02, 0x00, 0x00);
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let mut entry = DeviceTableEntry::new();
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entry.set_valid(true);
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entry.set_translation_valid(true);
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entry.set_mode(4);
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entry.set_page_table_root(0x1234_5000);
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table.set_entry(device_id, &entry);
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assert_eq!(table.get_entry(device_id), entry);
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table.clear_entry(device_id);
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assert_eq!(table.get_entry(device_id), DeviceTableEntry::new());
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Ok(())
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}
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}
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